Thanks for your reply.
The Vivado report shows that the VCCINT (1.0V) current is 3.156A, which is certainly above 2.6A. However, there is no particular warning or Error in the Power section of the Vivado project summary. (When the timing or power exceeds the specifications, the excess value should be displayed in red and the implementation result should be Error, but even with 3.156A, the synthesis and implementation are completed normally at the Vivado.)
Is the 2.6A limit of VCCINT not a limitation of FPGA but a limitation of power supply IC (TPS65400) of PYNQ-Z1 board? If so, I think it depends on the setting value of address D9h of the power supply IC (TPS65400) and the design of the peripheral circuit. However, the parameter design of the peripheral circuit is not consistent with the explanation in the data sheet of TPS65400, and "2.6A" is only the comment value of the circuit diagram, so I wanted to know the setting value of address D9h.