Varad

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  1. Hello, I am working with ZedBoard. I have created a custom IP using Vivado for my project. I have tested the working of my custom IP by setting the registers using "Xil_Out32 function (Xilinx SDK baremetal application)" . I have also stored output data of my custom IP to text file on the SD card (using xilffs). Now my objective is to create a petalinux project and implement similar functions(how I have used in baremetal). I dont know how to use Xil_out and xilffs library functions in petalinux. According to my understanding these are specifiaclly used in baremetal application. (in Xilinx
  2. Respected Zygot, 4 pins I have mentioned earlier are as following : I0,I1 (I value) , Q0,Q1(Q value). I thought of connecting them to GPIO pins and reading the values will work. My approach was as following: connect I0 to GPIO0[0] connect I1 to GPIO[1] connect Q0 to GPIO[2] connect Q1 to GPIO[3] Connect ClockOut (RF front end) to GPIO[4]. Then reading GPIO pin value and storing them in the file. Could you lease tell me if my approach is correct or not. If I am not clearer with approach or I am missing technical understanding could you please tell w
  3. Respected Zygot, Yes you are right.I need clock reference from data source. As mentioned earlier I have 5 ARM EMIO pins , amongst them 4 are data pins and remaining pin is clock pin. The clock frequency is same as ADC sampling frequency. So in order to validate my data I need to store the data only when I detect the rising edge of clock signal? In the second question, yes my current approach is not good. I thought of implementing a buffer, and I will store it in uffer till it gets full. When it is full then I will write this data to SD card. But I thought there could be one issue. I cou
  4. Respected Zygot, RF front end is providing 4 bit I and Q samples. Basically down converting the received data from receiver and convert analog data to digital. So every analog value is converted to 4 bit digital value. So my task is to connect the 4 pins to Zedboard read the signal and store it to SD card. My only constraint is Data is sampling at 30MHz. So I will be having 30M samples every seconds. I have to read the sampled data on ZedBoard and store it to SD card. You have mentioned about AXI interface. It would be very kind of you if you could provide some reference doc
  5. Respected Zygot, Thank you very much for your answer. I am really sorry about not providing the information very clearly. Here is the detailed explanation on the Interface. RF front end gives 4 bit digital data(ADC output). Sampling frequency of ADC is 30MHz. Output of RF front end is connected to PMOD JA on ZedBoard. In my HDL design I am using EMIO pins to connect my RF front end output to PL. Detailed steps are as following. 1. Enable GPIO EMIO from peripheral I/O Pins 2. Make the GPIO to"External" interface 3. Added the cons
  6. Respected Team, I am using ZC702 Board in my project. I have connected the Output of my RF front end EMIO pins. RF front end giving me output (ADC samples) at 30MHz. I have connected the Output of RF front end to PL using EMIO. I have used PMOD JA on ZC702 board to connect the output of RF front end. Then I have configured EMIO pins as (54,55,56,57.58) as external pins. Then I tried to read the value of pin using GPIO drivers in Xilinix SDK. My task is to collect read the samples from RF front end and write the data into text file and store it in SD card. Right now I have writt