[What is the data address in Zmod1410_Demo_Baremetal transferred from PL to PS side DDR?]

On 2021/6/10 at PM9点15分, zygot said:

如果使用该硬件设计方法，则 AXI 映射外设的地址在电路板设计接口中定义。您可以在从 Vivado 导出到 SDK 的文件中找到 SDK 中的所有硬件设计信息；system .hdf 和system .mss （假设 system 是您的电路板设计的名称）。

不幸的是，在文本编辑器中无法读取 hdf 文件，但是当 SDK 打开时，您可以在 Eclipse 中读取它。

Thank you very much for your help！

[What is the data address in Zmod1410_Demo_Baremetal transferred from PL to PS side DDR?]

Hello,

I am currently developing a project with the ZmodADC1410_Demo_Baremetal of Eclypse-z7. The development environment is vivado 2019.1.

I have encountered a problem using Zmod1410_Demo_Baremetal. By reading this example, I can’t know what the starting address of the DDR that zmod adc collects is sent to the PS through axi dma is?

Thank you to anyone that can help!