jeffdecola

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About jeffdecola

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  1. Hello all, I just bought the ARTY-S7 FPGA dev board! I got Xilinx Vivado up and running and I'm using the board to test my Verilog HDL designs. If anyone is interested in Verilog, I got some synthesizable examples in my Verilog repo https://github.com/JeffDeCola/my-systemverilog-examples For fun I did try to use Vitis, installed it, but it gave me a lot of licensing issues so I reverted back to the "Xilinx Vivado HL webPACK Edition". For my next project I want to control some of the I/O pins of the FPGA. So I'm thinking on using my raspberry Pi's GPIO pins and c