This is my first fpga design. I am new to digital design. I am using Eclypse Z7 board with Zmod ADC.
My question might be illogical, but I wanted to clarify my thought.
Data coming from Zmod ADC is send to BRAM. I wanted to monitor data coming from ADC and also data coming out from ZmodADC controller IP. I have used ILA debug , but I couldnt monitor the ADC data. In set up Debug there was no clock domain selected for these data. I tried to give clocks available but there is timing failure in Implementation.
Is there a way that I could observe my inputs and outputs f