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Tim.O

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Everything posted by Tim.O

  1. Thank you for your comments. I'll check web pages you linked! Personally, I was guessing the procedure. -Using any D.L. framework, create a weight file that matches the real configuration (FPGA channel or I/O) -Rewrite it to C++ and put it on FPGA with Micro-blaze (soft CPU) -Based on FPGA input: High/Low, FPGA provides High/Low following the weight file. But, if #of FPGA I/O is not sufficient, a couple/few of FPGA must be used. In that case, how is communication among them done.... Anyway, I have to investigate it. PYNQ is probably helpful to brush my knowledge up...
  2. Are there any introductive hands-on web pages or articles on Deep/Machine learning on FPGA Artix7 (not ZYNQ or PYNQ) ?? I'm doing deep learning using Tnsorflow or KELAS, and now, I'm thinking of performing it on FPGA Artix7. But, I do not have any clues to start it. If someone knows useful information, could you tell me. Best regards.
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