Jump to content

jowell88

Members
  • Posts

    4
  • Joined

  • Last visited

Recent Profile Visitors

The recent visitors block is disabled and is not being shown to other users.

jowell88's Achievements

Newbie

Newbie (1/4)

0

Reputation

  1. Hi, I'm designing a board based on the zynq z7010. I have few questions about the zybo z7 schematic (rev d1). 1 : A FTDI FT2232HQ is mentionned in the reference manual but I can't find it in the schematic. It has been removed ? Why ? 2 : At sheet 13 pin VREFCA and VREFDQ of DDR require bypass capacitor but why C177 (CA Byp) is connected to VCC1V35 since the reference voltage is DDR3_VREF for both pin ? 3 : MIO bank 0 is set to 3V3 VMODE (MIO7 pin pulled down to GND with 20k > UG933 table 5-3) and MIO bank 1 is set to 1V8 VMODE, but UG933 says "If the MIO bank voltage is incorrectly set, the I/O behaves unpredictably and damage might occur. An exception to this requirement are temporary Boundary Scan EXTEST operations which require 1.8V MIO banks to use a 2.5/3.3V VMODE setting for correct EXTEST operation". Since MIO bank 1 is set to 1V8 mode, the EXTEST operation won't work correctly on zybo z7 ?
×
×
  • Create New...