Dannny

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  1. Dannny

    Video RAM in DDR

    Thanks all of you. I was hoping that I can live without VDMA, but it seems that I have to do it anyway. The main reason for this exercise is to have fun and to learn something new. I found basic blocks for the embedded linux on github or opencores and I already tested some of them. So, I'm getting more and more units to work :-)... But the Video RAM is first "blocker" on the way. I'll look into other examples as well. If any of you have some other ideas, don't hesitate to share them :-)... Thanks.
  2. Dannny

    Video RAM in DDR

    I just tried to use MIG to generate two controllers, but it seems that it's not suitable for the FPGA board. Vivado says that multi-controller needs DDR3 SDRAM whereas Nexys A7 has only DDR2 SDRAM...
  3. Dannny

    Video RAM in DDR

    I don't have to use MicroBlaze (or other pre-built blocks). In other words, I want to stay at HDL as much as I can. There are open source processors that can be easily put to Nexys A7 (either embedded ones or the ones with Linux support [e.g., OpenRISC, RISC-V processors, ...]). But this is the second step from my point of view. I'd like to get the video output figured out and then put a smarter image generator that could be a processor in the end (ultimately with Linux and framebuffer).
  4. Dannny

    Video RAM in DDR

    The ultimate goal is to have linux with framebuffer (simplefb module) up and running. But I thought that I'll start with just a simple image generator to prove the concept first :-)...
  5. Hi, I want to develop a simple subsystem that is shown on the picture below. Basically, I need one producer that would generate a picture(s) and one consumer that would display the picture. The consumer is easier part, it's VGA block that reads the pictures from the memory. I want to use a bigger resolution, so I cannot use BRAM and I have to go for DDR. I'm planning to use MIG for this job. The question is whether I can configure DDR as a dual-port ram (one port for generator and one port for consumer). Is it possible? If not, I think that I have to go with multi-master bus, so the consumer is another master on the bus... Other memories that Nexys A7 has are too small (and I guess also to slow). Any help is appreciated. Thanks, Dannny.