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  1. Hi @JColvin, This post was helpful for me. I have already tried this. Currently, for testing UART part, I have shited to Adder example. Currently focused on below example to achieve my work for user flexibility to send trace file through UART. Task Definition: Send the inputs through UART from a file, addition is then performed on FPGA and send the sum back through UART. Step 1: Designed 8 bit adder and created IP of this module (Mapped I/O of this module to the slave registers of Zynq ARM processor) Step 2: Generated Block design connecting PS and PL through AXI protocol Step 3: Created wrapper of new design and generated bitstream Step 4: Launched SDK local to this project and created an empty application project Step 5: Wrote the C code, given the inputs to adder through UART and mapped them to the base address of slave registers. Till this step I have tried. I guess it is almost similar to the first post mentioned by you. So , now I want to give this input from file rather than giving it manually. File handling functions in C are not working. I will attach C code of my project. main.c
  2. Hi @JColvin, Thank you for your help. I will go through these threads.
  3. Hello all, I am implementing hardware implementation of cache simulator so for that inputs to this simulator will be configuration file and the memory trace file. So currently I am using Block ram from IP catalog in vivado and in that providing a ceo file of memory trace as input. To make it more flexible for user to provide the memory trace I want to use UART module to send the memory trace to the PL logic (where the whole logic of simulator is dumped). As UART in Zedboard is in the PS side so how do I use in PL side? Any suggestions how should I proceed? Thanks in advance.