Pier

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  1. you know read some code would have been of great help, but i understand your point 😄 thx again
  2. The cheapest wavetable could be used is 2048 samples , to be able to achieve an acceptable num of harmonics, considering sf. In your NCO you go 4x and that is already pretty good, i can say that without hearing that, it must be really nice sounding if in audible range. Problem is that my design needs to write the whole wavetable again at each playback cycle. so , bigger the wavetable, higher the clock, until it gets to be impossible. i was tryin for 16384 samples, but if there isn't a parallel design it is too much. i scaled down to 2048 to start to simulate how many resources it will really eat
  3. Thx Zygot, i will be looking the resources you linked, your code should fit that kind of operation. I will try to run your demo on cmod s7 Of course tailor things is much better, which is what i will try slowly to do.. also because there is no other way on many processes. I tried dds cos appears compelling also beacuse the phasor i need must behave like a LFO I want to add that in case 27.5hz-7040hz i would need a 0.2 hz resolution, while on the other case (0.25hz-64hz) it goes to 0.001 hz as i have 32768 control steps. After all dds is not so expensive if used only as phase accumulator. I will follow you guys's advises... 💓
  4. Hi everybody , and thanks for all your inputs... I know what i stated at first sounds crazy, but the design i'm working on implies to be able to update the wavetable array at least at every playback cycle. In this sense i could use dds to be just a phase acc output that would be the reading index of the wavetable array.. As the wavetable cannot be less than 2048 samples (cos otherwise it wouldn't be ok) and considering all the processes this wavetable is serially intended to get, i should go quite fast. I just want to point out that i have already simulated my design on a different platform, so.. it works, i'm now struggling to set dds compiler to put out 16bit output at these different ranges: 0.25hz-64hz and 27.5hz-7040hz. Pls, as i'm the super noob in here :-D, could you confirm that to do that with dds (having streaming options available) the only way would be to have a clock as slow as 190Khz ? Thx so much again for all your inputs , and the ping pong buffer would be a real game changer, of course..
  5. hola, gracias, i saw already dds compiler guide...but i don't know really.... that's why i'm asking you because as following page 16 formulas (i cannot know what phase increment to use .) if i say clk =100 Mhz B=16 Fout =27.5 Hz then the phase increment comes out to be 0.018. so the only way to do it is reduce clock speed to 100khz . is it right? But also, in this case frequency resolution would be a mere 1.52 hz which is not really good actually , and to make it better i would have to higher the bits number of at least 1 bit.. so i still cannot see a way out
  6. Hi, I'm trying to achieve a 16bit waveform output from dds compiler, could somebody help me to set it up correctly? I actually need two different dds and two different ranges with streaming options 1) 27.5hz-7040hz 2) 0.25hz-64hz. First is for an audible range oscillator, second for a control oscillator. i've been experimenting with the tool and i got i need to put a higher frequency resolution and so have a phase input up to 64 bits (?) is this right?
  7. Pier

    zybo dma demo

    Indeed, thx a lot! I would like to ask you if there is any resources , experience or code, for tdm transmission protocol out there Thx, Pier
  8. Pier

    zybo dma demo

    thanks a lot JColvin, now is ok, i encounter the same problem for xadc demo , It's really important for me cos those two contain important hints for my design. please could you link me that too?
  9. Pier

    zybo dma demo

    Hi , in none of the repos connected i can find the file zybo-z7-10-dma.xpr you mention in the instructions. eventually could you send a script for the block design ? Thanks
  10. Pier

    Zybo Board Cad File

    Thx, in many other viewers you cannot measure, anyway ok, you have 3.8mm holes, with center at 3.8mm from the origin , Making a 2d pdf with few key measurements (without tilde) like the one you made for pmod would be great
  11. Pier

    Zybo Board Cad File

    i've done that, but i cannot get any measures from a step viewer
  12. Pier

    Zybo Board Cad File

    Hi, I cannot read this file. In my design zybo will be mounted on top of an input board. Could i know what is the diameter of the mounting holes ? I also need to know possibly the distance of the center of the hole from origin. Thanks a lot
  13. Pier

    cmod S7 zyboZ7 connection

    Thx a lot for your evaluation
  14. Pier

    cmod S7 zyboZ7 connection

    Thx zygot, they grasped it.. the function i'm talking about is implemented in Touchdesigner and Houdini and etc. i tried to explain it better, thx, anyway, I know, but it doesn't matter, if i reapet it now is cyclic noise. 😄 or just a waveform
  15. Pier

    cmod S7 zyboZ7 connection

    Well, Some details: in this design every operator will do calculations with an array of 1024 16bits values before passing the array to the next operator. (It's easy to go over 20000 ticks considering all operations and external inputs) Final wavetable array is used by a wavetable oscillator. so problem shown in the video is : given an array of 1024 16bits values, fill a new array of 1024 16bits values containing 2 cycles of original array, 3 cycles, 4 cycles and so on it does not sound like a student problem to me, but i'm not an expert of course, pls help me code that