Leon Heller

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About Leon Heller

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  1. According to these Tcl messages it looks like the Digilent JTAG I/F isn't supported: warning: cannot find symbol ftdimgr_lock in library dpcomm.dll, frequently used Digilent JTAG cables cannot be supported warning: cannot find symbol DjtgGetBatchProperties in library djtg.dll, select Digilent JTAG cables cannot be supported I suppose that I could get a standalone Digilent JTAG cable. I could connect that to J8 and see what happens, but it looks as though that will be rejected, as well.
  2. Thanks, Nate. The error is in the project - see the Project Settings. The strange thing is that the Implementation window has the correct part. Still having problems with download. The cable should be OK, as the board gives the usual sounds when connected and disconnected, and the device is visible in Devices.
  3. The ARTY GPIO demo is set up for the XC7A15T, but the actual device that has been fitted is the XC7A35T. This error should be corrected.
  4. I've synthesised and generated the bitstream OK for the ARTY GPOI demo, but when I try to connect to the board using the Hardware Manager I get the following error message: [Labtoolstcl 44-26] No hardware targets exist on the server [TCP:localhost:3121] Check to make sure the cable targets connected to this machine are properly connected and powered up, then use the disconnect_hw_server and connect_hw_server commands to re-register the hardware targets.I've tried different USB ports with the same result. Is the board faulty?
  5. You could ask Digilent. I had a problem with the license - the voucher code wasn't accepted. I'll have to contact Xilinx support.
  6. It has just been delivered (a day early!). It came with a voucher for the Vivado tools.
  7. Yes, it does. I'll receive my board from Avnet tomorrow, and should be able to confirm it.