ASMartin

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About ASMartin

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  1. Hi. Still waiting for a new stereo cam system, maybe for FMC interface to use with Nexys Video. Any new?
  2. Hi guys, I'm Alex from spain, working on Stereovision project to see depth of objects using VmodCAM and Atlys. But I never sent my project to anybody. Regards, Alex
  3. Hi virtextoo, Thanks for you reply. I asked to Bianca and seems to be a long term project (some months, at least), so by now, we have to keep using VmodCAM with this adapter for Nexys Video. Regards, ASMartin
  4. Hello Bianca, Any new about the new stereo cam system?, no information regarding this issue in the "New Products" or "Coming Soon" menues from main digilentinc.com page. Kind Regards from Spain
  5. My personal library also includes: FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version by Chu
  6. Thanks Virtextoo. I'm a man of facts rather than promises . I previously asked for a stereovision camera module like VmodCAM for Nexys Video (FMC-LPC interface) last october, but I received no answer. That's why I decided to develop this interface adapter.
  7. Hello Bianca, I developed an interface card or adapter to connect VmodCAM to FMC-LPC interface (mainly Nexys Video oriented). You can have a view in this subforum, VmodCAM2FMC Interface Card Maybe this could be interesteing for VmodCAM users to migrate to Nexys Video. Best Regards.
  8. ASMartin

    Nexys Video + Camera

    Hi Jay, I finally mounted and FMC-LPC to VHDCI adapter to connect the VmodCAM module to the Nexys Video. It looks like this: It's just a prototype. I also developed a UCF (.ucf) file to map VmodCAM signals to Nexys Video FMC port. Maybe this could help you.
  9. Hi ALL!!! I made an adapter to connect VmodCAM to Digilent Nexys Video FPGA board through the FMC connector. It looks like this: Top View (VHDCI Connector) Bottom View (FMC-LPC Connector) VHDCI Connector View VmodCAM (Not included) VHDCI Male to Male Cable (Not included) Digilent Nexys Video (Not included) Please note the VHDCI connector is female so you will need a VHDCI male to male cable to connect the VmodCAM (not straight connection). This is a prototype so if you are interested just contact me. Attached file is a User Constraints File (.ucf) for this module on Dig
  10. Well, 33 is not allowed (greater than 32) but I will try these ratio converters: x11/16 to give 68.75 MHz (with a VCO working at 1100 MHz) and x27/25 to give 74.25 MHz (with an VOC working at 1856.25 MHz). Thanks for your help, mate.
  11. Hi Mike, Thanks for your solution but range is now working, CLKFX_DIVIDE in range (1 to 256) CLKFX_MULTIPLY in range (2 to 256) for DCM_CLKGEN, but for DCM_SP CLKFX_DIVIDE in range (1 to 32) CLKFX_MULTIPLY in range (2 to 32) So it's not possible to synthesize 33Mhz I need to obtain 74.25 MHz. The trouble is just the warning message.
  12. Hi Sam, thanks a lot for your support and information. I've to use DCM_CLKGEN because I need a 33/100 ratio and I can't obtain that clock ratio with a DCM_SP (out of range). So I will suffer this warnings
  13. Hi. I need some help about ISE Xillinx. I used a combined DCM-CLKGEN (master) and a DCM_SP (slave) clock generators to obtain 75.25 MHZ for HD (720p) HDMI output at 60Hz. This is the code: TMDS_MASTER_DCM: DCM_CLKGEN generic map ( CLKFXDV_DIVIDE => 2, -- CLKFXDV divide value (2, 4, 8, 16, 32) CLKFX_DIVIDE => 100, -- Divide value - D - (1-256) CLKFX_MULTIPLY => 33, -- Multiply value - M - (2-256) SPREAD_SPECTRUM => "NONE", -- Spread Spectrum mode "NONE" STARTUP_WAIT => FALSE, -- Delay config DONE until DC
  14. Yeap, that's the right solution, the one provided with DDR2 for 6 family by MIG. I have to implement 3 queues with FIFOs and a round-robin mechanism to access them. I know, but I'm looking for a working solution to save time. I've been working with ATLYS (Spartan 6) with vmodcam and HDMI output (HD720p split) and some algorithms to enhance borders and color mapping just for a stereovision system, but I need more slices I already designed and implemented a card to interface FMC to VHDCI (VmodCAM interface). And I'm now mapping the example for VmodCAM from Atlys to Nexys Video, just for testing