tuskiomi

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  1. Good to see that I'm starting with the trivial implementation.
  2. Does digikey honor digilent academic discounts
  3. Okay, processor company jabbing aside ;-), I'd like to introduce my other application. Years ago I created a program which takes trained neural networks, and exports them to HDL -like formats (think lots of LUTs). Eventually, I'd like to take these neural networks, and if resources allow, place them directly into the fpga, which would allow a trained network to be executed in just a small number of clock cycles, instead of multiple hundreds. Trouble is, neural networks require lots of resources. One neuron will take up 8 LUT inputs, which is silly when you have thousands of neurons, and then you need to consider a memory loader, etc. In any case, lots of LUTs are preferred, and I think the genesys 2 is my board. Trouble is waiting.
  4. I love this advice. In short the application is a generic RISC V core in which there are many smaller RISC CPUs which are simpler, and support much less instructions (no access to ctrl regs, half precision multiply, etc). i want to experiment with branch prediction, vector instructions, and simple loop compression, as well as what you mentioned with feeding algorithms. one step at a time though, and ive been modifying an open source risc V processor for the last few months, and at this point i cannot make any more progress without physical testing, as vivado doesnt support some vhdl 2008 features during simulation.
  5. Hello, I suppose I should have specified, I'm doing design involving high core counts (64+ cores), so it seems natural that i would run low on cells.
  6. Hello, all. I'm an aspiring CPU designer, looking to design my first CPUs, have compiler errors, and learn a lot along the way. I finished my first FPGA class this last semester, and I'm hungry for more. The FPGA we used in class was the Digilent Nexys A7. This board worked well for what we did in class, but I would like to upgrade, as I found myself commonly exceeding the number of cells available during experimentation. Here are my working requirements: Must have: At least one Ethernet port, either directly connected, or connected via PHY. Some sort of EEPROM or non-volatile storage capability Onboard display for de-bugging on the fly. Can be a LCD, 7-segs, LEDs, whatever. Must be around or under 1k$ US Be shipped from North America Internal clocks of at least 50MHz Xilinx-based FPGA If not supported by Vivado web-pak, it must come with a license to synthesize and implement RTL HDLs. It would be nice to have: Many, many logic cells Three Ethernet ports On-board interfaces (buttons, switches, etc) onboard DIMM slots for RAM, USB programming interface A board listed under Vivado's 'Default parts' menu when creating a project. With these requirements, what would be the best FPGA development board for me?
  7. Thank you, Can you speak as to if anything is in the works at a similar price point at this time? I may just hold out for something new if it's in the works, but if not, it's the Genesys 2.
  8. Hello, I'm looking to order a genesys 2 from the digilent store with an academic discount ASAP. Are there any ETAs of when they will be available?
  9. Hello, I may be seeing something incorrectly, but there are 1GB worth of RAM chips on the Genesys 2 board. The RAM is not included on the master XDC file. Is this a mistake, or is the ram coupled on a deeper level to where the XDC does not need to specify it?
  10. @JColvin I'll ask around on the Xilinx forum. There is an additional license for the webpack which is labelled "V_Webpack", I'm not sure what features that enables, but We'll find out soon. EDIT: The Webpack contains all of the features the the full edition of Vivado does, but it is limited to a select number of older FPGAs.
  11. Just to confirm, Does this include the licences outlined in red (which normally are free for 30 days, then require a one-time payment of 2,995$ to xilinx), or are they to be purchased separately?
  12. Hello. I'm looking for additional memory for my FPGA board. I looked at the schematic for the FMC on the Genesys 2 board, and found that it has enough IO to support a DDR/DDR2 SODIMM slot. Are there any products out there which can expand volatile memory through the FMC connectors? Any volatile memory is ok, but one for DDR or DDR2 RAM chips is preferred.
  13. Very interesting! do you know if there are Ram slots that connect to the FMC slot?