pooja

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  1. Thankyou Clyde and zygot for reply. TDC is FPGA based controller which counts the pulses and gives timestamps of pulses.(if i am applying 1Mhz signal to it,it will give time stamps like 1us,2us,....etc.).resolution of TDC is 400ps.I am using 2 TDC and controllng them by 2 computer.I tried to synch both TDC.(I applied ref clock out of one TDC to ref clock In, of other, i mean first one is master and 2nd one is slave.)I am applying same input signal to Both TDC.I am expecting same time stamps in both TDC(obviously there should be some delay because of cable and all),but that should be constant (ie if I am applying 1 Mhz signal to both TDC,then if time stamps in first one are 1us,2us,3us.......then 2nd TDC should have time stamps like 1us+_ delay, 2us+_delay, 3us+_delay.....so on.)Now in my case this delay is varying with time. some time it is 7ns,50ns, or 700ns so on.It is random.is it mean that they are not synchronise?.if it so then how to ensure their synchronisation.
  2. hii, I am using two TDC(time to digital converter ) controller to record time stamps of events/signals.I am applying exactly same signal to both the TDC.I am getting diffrent timestamps in both TDC,since both controllers are running with its own clock ,the time stamps are not same.I want same time stamps in both TDC(as I am applying same signal to them).To synch both TDC controller I applied reference clock from 1 controller to other controller.but again I am getting different time stamps.how do I check that both controller are synchronised .how to ensure synchronisation between any two controller/FPGA/devices.
  3. pooja

    uart through FPGA

    Thankyou zygot for your suggestion. you are correct that there is no point on having a file with a sequence of 0 and 1. I want to save timing information of pulses at rising edges ( If my clock frequency is 5MHZ then data file should have 5 mega data point which should show the timing of rising edge that means at which time it occured.)Now you might have question that if signal is periodic then what is point to save all?but my signal is RNG having 200ns bit duration.so it is importent for me to save each edges because signal is not periodic.please suggest me how can I save timing information of pulses with frequency 5MHZ in real time.
  4. pooja

    uart through FPGA

    Thankyou lonel for your suggestion. you are correct that there is no point on having a file with a sequence of 0 and 1. I want to save timing information of pulses at rising edges ( If my clock frequency is 5MHZ then data file should have 5 mega data point which should show the timing of rising edge that means at which time it occured.)Now you might have question that if signal is periodic then what is point to save all?but my signal is RNG having 200ns bit duration.so it is importent for me to save each edges because signal is not periodic.please suggest me how can I save timing information of pulses with frequency 5MHZ in real time.
  5. pooja

    uart through FPGA

    Thanks lonel, I wanted to transfer same data to PC which I generated in fpga .(I am generatting clock through fpga so i want to save binary file in computer which should reperesent the clock generated by FPGA .inary 1 for high and 0 for low). I need to keep record of data what i have transfered through FPGA so i want to generate and save parellely.please suggest what is correct approach to do it.
  6. Hi, I am using Arty 7 to generate clock with different frequency. I wanted to save this data in my PC .since baud rate is 115200 and i am generating clock with 5MHZ ie at Rate of 5mbps. here speed of generation and data transfer are not same,speed of data transfer is much less than generation. please suggest me how can I save the data which i am genereting at same time.should I use ethernet for It?