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Everything posted by linasr

  1. linasr

    Pcam Visible Border Line

    This means no solution at the moment? Right? Can I help fixing this?
  2. Dear All, I was able to port the camera design to Genesys 2 board. I see this Visible Border Line as mentioned in Zybo Z7 demo description. Is there a solution for this problem already available? I use following IP blocks: MIPI_D_PHY_RX (1.3) -> MIPI CSI-2 Receiver (1.1) -> AXI_BayerToRGB (1.0) -> AXI_GammaCorrection_0 (1.0) -> axi_vdma Thank you Linas
  3. It works, with pullups and right address I can read 0x78 from 0x3100 register. Thank you for your help solving this problem!
  4. Not yet, implementing it right now. Edit: I added PULLUPs on both I2C lines, but it also does not work. I suspect Xilinx IP waiting for ACK/NACK and failing to get it. And I am very curious if the camera uses I2C with ACK/NACK, or normal Serial Camera Control Bus ignoring 9th byte.
  5. CAM_PWUP is 3.3V, just checked with multimeter. I think, if it would be low I couldn't communicate with I2C switch, since CAM_PWUP is connected to it's reset pin. And yes, you are right about address, but still does not work after fixing that.
  6. Hello, thank you for your fast reply. Attached is my main file, it's made from Xilinx xiic_low_level_eeprom_example.c file. No interrupts, very low level. I think, my address was wrong, it should be 0x3C since Xilinx IP adds bit for read or write operation. But it still does not work. I also attached a picture how my AXI IIC block is being generated. Next experiment: write I2C bit banging Microblaze version without ACK/NACK ckeck. main.c
  7. Dear All, I am having problem communication with Pcam 5C from Genesys-2 board. There is also FMC Pcam Adapter in between. I can set I2C switch, enable A and B channels, attach logic analyzer to channel B and Pcam 5C on channel B. Pcam 5C is inserted properly - I can measurem VCC3V3 on pin 15. There is Microblaze in FPGA controlling Xilinx AXI IIC (2.0) with following code: sendData[0]= 0x31; sendData[1]= 0x00; SentByteCount = XIic_Send(IIC_BASE_ADDRESS, CAM_ID, sendData, 2, XIIC_STOP); ReceivedByteCount = XIic_Recv(IIC_BASE_ADDRESS, CAM_ID, rxBuffer, 1, XIIC_STOP); I want to
  8. Dear All, what is the situation with reference design of Genesys 2 board and Pcam 5C camera? I see, that Genesys 2 board supports FMC Pcam Adapter and up to 4 cameras. So is this reference design available or user must port it by himself from another Digilent board? Genesys 2 is great board with plenty video connectors for video applications otherwise. Linas