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  1. @artvvb thanks thats really helpful!
  2. I am new to this so I am just guessing how to out stuff together. I want to use the PmodI2S2 for Stereo Audio Input and Output. I am using a Cora z7 with a ZYNQ. I want to try and make two things: A. Connect the PmodI2S2 via Axi and then write a software application in Vitis to send and receive audio data. B. Connect the Pmod12S2 to logic and modify audio data. Possibly make an oscillator. The "Pmod I2S2 FPGA Volume Control Demo" in the resources centre says it uses an AXI streaming interface. So for part A. I made a new IP with an AXI streaming interface (ju
  3. Okay that sort of helps. I added another AXI GPIO block and moved the leds to that. Then in xparameters I set #define XPAR_XGPIO_NUM_INSTANCES 2 and it allowed me to create two gpio devices and have the buttons and leds working on separate ones. The channels automatically map to addresses using the code in xgpio.c. But the Pmod drivers all use addresses so that easier. One issue I am facing is with the PmodENC. It only uses 6 pins so I have a splitter cable connecting two pmodENCs to one Pmod connector. I looked at PmodENC.v and some of the related files and it looks like it just maps the
  4. Hello I have a Zynq Cora 7s. I am adding some leds to control via software: This is in the constraints: #set_property -dict { PACKAGE_PIN L15 IOSTANDARD LVCMOS33 } [get_ports { led0_b }]; #IO_L22N_T3_AD7N_35 Sch=led0_b #set_property -dict { PACKAGE_PIN G17 IOSTANDARD LVCMOS33 } [get_ports { led0_g }]; #IO_L16P_T2_35 Sch=led0_g #set_property -dict { PACKAGE_PIN N15 IOSTANDARD LVCMOS33 } [get_ports { led0_r }]; #IO_L21P_T3_DQS_AD14P_35 Sch=led0_r #set_property -dict { PACKAGE_PIN G14 IOSTANDARD LVCMOS33 } [get_ports { led1_b }]; #IO_0_35 Sch=led1_b #set_property -dict { PAC
  5. Hello I am a noob, but I have a board setup using the linux supplied from digilent: https://github.com/Digilent/Petalinux-Cora-Z7-07S So I assume this package includes a hardware design and a kernel module that memory maps the I/O on the board so I can access it in linux via a C application i write... But how can I work out which pin is mapped to which address etc so I can write code to use it ? I was thinking maybe this is something to do with it : https://github.com/Digilent/digilent-apps Ideally someone can help me open the hardware design in vivado and open
  6. I want to add/ enable rsync in petalinux Im using the bsp from here https://github.com/Digilent/Petalinux-Cora-Z7-07S But If I build it from source I think I can add a package? I can see that there is a mention of rsync in a file called rootfs_config here: So can someone point me to an instruction or tell me how I can enable rsync ? Thankyou!