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  1. Thanks, Yeah I don't want to have to load the registers needed for ram timing or other init. Does xilinix provide libs for baremetal programs? Where do I find the documentation?
  2. Thanks. I don't have a problem with Xlinix code but I want to have full control of the ARM handed off to my program vs running under an OS. My understanding for otherboards is a bootloader is run first prior to program entry. Do you know if Xlinix SDK offers full debug support in baremetal?
  3. Hello, I took everyone's advice and I played around with quartus and vivado and honestly I like quartus but I digress. I think I want to get a hybrid SoC/FPGA device to play with instead of plain FPGA. My question is, does the vivado webpack allow for full ARM baremetal development/debugging on the Zynq devices provided by digilent? I found out rather late that Quartus "community" edition doesn't support baremetal development(a ridiculous omission since you're developing an FPGA hybrid but anywho....)
  4. So how would the synthesis handle it if it couldn't complete it in a single clock cycle? For example if I run a process that adds up the output of the multipliers and have it output every clock cycle - will Vivado give some type of error? The procedural way to write this is have the system do a loop over each coefficient in the FIR filter, multiply it by the input signal and accumulate(and I have seen some VHDL code which does this), can the synthesizer take procedural code like this and turn it into parallel code on its own? I kinda feel VHDL is a lot harder than regular programming since it's not clear how the synthesize will handle it while it's pretty clear how it's done procedurally.
  5. Hi, So I was wondering for FPGA devices(like the Arty S7), how does one find the maximum time it takes for a primitive to end in a stable state? For example lets say I have an 10 tap FIR filter. In its more simple implementation there are 10 multiplies(which can be done in parallel) and 10 sums(which must be done sequentially although there is a tree based configuration which requires more summers but incurs lower total delay). How do I find the propagation delay for the 10 sums so I can figure out the fastest the FIR filter can process inputs? Also I'm a little confused on the differences between using VHDL operations(ex: *) verse manually setting up the DSP slices. Will the synthesis tool automatically configure the DSP slices for me if I use the multiply operation? In general how does manually instantiating the primitives compare to using VHDL library oprations?
  6. Yeah! So I looked at the specs and I guess the Arty S7 lacks the transceiver modules? I'm not completely sure what they do because they are clearly not wireless transceivers. Otherwise its specs are better, maybe I should get that one. Independent of FPGA, what VHDL simulator do you like best?
  7. Hi Thanks, I would just use synthetic data, interfacing a highspeed circuit is outside the scope of what I'm interested in doing currently but I did see that Terasic has some boards/addon boards which include the full analog front end. If I was going to spend 500+ I would probably get one of those. I have an analog discovery so what I think I could do is connect the logic out to the FPGA and load the decoded symbols to RAM to be transferred back through the USB connection. I have a pretty solid background in theory but very little hardware experience but I want to try to fix that. I guess the question is should I get a cheapy FPGA like the De0 nano just to try out and then buy a nicer one later or get an arty for ~130 which can do some more stuff(if I get serious I'm sure I'm going to buy something else but maybe the Arty will last longer).
  8. Thanks, How do you feel about the cheaper Arty A7(T35) vs the more expensive Arty S7(T50)? I understand the S7(T50) has a bigger FPGA with more DSP splices, other than lacking an ethernet port I'm not sure how they compare but they are the same price currently and I'm not sure what the other benefits of the A7 are. Do you think the A7 T35 has enough logic elements in it to keep me busy for a while?
  9. Ok I have some specific examples: 1. I want to implement a transceiver, I will assume the analog frontend is already outputting I and Q channels with a set of bits 8, 12 or 16. There are a couple DSP functions the device will need to do: carrier synchronization, timing synchronization and channel equalization. I already have the algorithms I just want to play around with how it would work on the FPGA. Carrier synch will use two FIR filters and do band edge recovery, timing recovery will probably use muller and muller. 2. I want to implement STFT on incoming data streams and track the center frequency. 3. I want to do something with beam forming, not sure what exactly. Dunno about the computer vision part though, just wanted an option tbh.
  10. Can you do a complete design only in software without first purchasing a board? I was thinking if I wanted to try implementing a DSP application or do something with object detection the 32mb ram would be a problem, though I admit it's not absurdly small like the basys 3. I admit I don't know how hard it will be to interface to the DDR ram on the Arty either directly(which maybe will be too much work considering the DDR3 timing stuff looks hard) or using the memory interface. I'm actually really confused on how you can take an IP block and interface it with your own VHDL code since all the project examples have people dragging and dropping IP blocks which are already designed to work with each other. TBH Cuda is way easier and probably will dominate over FPGA, the only hurdle that needs to be gotten over is the lack of deterministic performance which is a serious problem for any real time application which requires certain performance bounds(ex anything in real time communications or control).
  11. Thanks, I don't consider 130$ to be too much of an investment. I understand on the lower end devices both Intel and Xlinix have free software but the standard or pro costs are ridiculously high. The Arty S7 vs Arty A7 - is there something wrong with the Spartan? Unless you need an ethernet port or looks like you get more from the Spartan for the same price. To be honest I'm not that interested in being a digital designer but a lot of jobs in my field want someone with some background in CUDA and VHDL since FPGA and GPU are often what sensors feed into. In terms of popularity it looks like Xlinix still has an edge, I don't know though which is better to start with. The Basys 3 has such little ram(of either type) that IDK about getting it. The de0 has 32 MB of ram which isn't a lot but it's enough to not run out immediately on smaller projects but the FPGA doesn't have any dsp slices.
  12. Thanks, I was actually little worried about the Basys 3 when it cames to I/O since it seems to only have pmod connectors and no female hookups or Arduino interface thingy(lol). I was also interested in the SoC products both here and the Altera one DE-10 nano. But since I'm just starting FPGA programming it seems like adding a hard processor into the mix with its own architecture which the FPGA will need to do interact with will make things even more difficult versus straight VHDL programming. I haven't used the FPGA tools before but the IP generator seems somewhat confusing for all the boards.
  13. Hi guys, I am looking at getting a cheaper FPGA board (<250), preferably less than $150. I'm a little confused on what I should buy. The Basys 3 is popular and has a number of courses posted online which makes it attractive, but sadly it lacks DDR ram which somewhat limits its use(maybe that's irrelevant for someone starting out, I don't know). I also looked at the two versions of Arty: The Spartan 7 and the Atrix 7. It looks like the Spartan 7 is cheaper for a bigger FPGA but I'm not sure how these compare but the bigger Atrix-7 is much more expensive. What do you guys suggest? Is having onboard DDR important for someone starting out? Having a course to follow which uses the Basys 3 is super nice but I kinda feel I will run out of memory super quick, even more so if I try adding a camera and doing vision stuff.