richa

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Posts posted by richa

  1. Hello All,

    I am using zynq 7000 customize board.In that a pin which is on bank 35 (FPGA) is taken on connector(j3).J3 connector is 7 pin connector in which 7 no. pin is ground.

    I am testing all io's by writing counter code.

    I am getting waveforms on DSO for  all pins except  6 no. pin.

    I have added then chipscope .On chipscope i am getting the waveform but not on DSO.

    What can be the reason ?

  2. @zygot

    zynq 7000 customize board.It's our customer application which was on spartan previously .Now the complete design has migrated to ZYNQ  so I have the work to migrate the spartan design onto zynq.I can not modify their design .I have done it .problem I am facing regarding function execution 

     

  3. Hello folks,

    I am working on zynq 7000 board in which artix 7 fpga is there.In the old design spartan 3 was used.

    I am working on migration from ISE 8.1 to vivado 19.1.

    I have migrated vhdl code easily but facing problem in migration of processor side.

    I have created a new block design in vivado by using IP integrater with the reference of MHS file in ISE.

    In ISE 8.1 block design program run from SPI FLASH which is connected to microblaze and which copy the contents from FLASH to SRAM (external memory connected to microblaze in block design).

    In zynq 7000 as FLASH is towards ps side and OCM is there in zynq so I din't used external memory as well as SPI flash in block design.

    My microblaze application is running but it is taking more time compared to spartan.

    Delay problem was also there as in ISE they used function for delay.I have solved it out the delay problem also by hit and trial method to set the count value.Now the function Delay_mSec(100) produce same 100ms in zynq as was in spartan.

    But still fucntion execution taking time in ZYNQ,

    I have put led on and off between functions then I found there are two functions which is taking 16 ms in SPARTAN and 296 ms in ZYNQ.I went through those functions and found in that functions multiple functions are called which is related to FPGA -microblaze communication using GPIO port means FPGA sends the 32 signal to microblaze using GPIO port and microblaze output the signals through GPIO port to FPGA where each bit is mapped from some signals in FPGA code.

    Now i am not getting that why this this much delay is there?

    If anybody could help me out then it will be relaxing for me as i am struggling from 1 month.

    Thanks

    Here I    am attaching the block design

    system.pdf

  4. Dear All,

    I am using MIO pins 44,45 for UART1 in ZYNQ. For that i have created block design in vivado 2019.1 by taking zynq processing system .export hardware and launch sdk.

    In sdk I have made a simple hello world application.I have set the baudrate and all other parameters of SDK terminal but hello world is not printing although it is working for EMIO pins.

    My all the uart are on 500 bank which has 1.8v and EMIO pins have 3.3v.

    I have checked 2 MIO pins on bank 501 which has also 3.3 v.On that it is working.

    Only for 1.8volt it is not working as we have used isolator for it max218.

    Please help me out where the things get wrong?

     

    isolator.PNG