Irfan

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  1. Irfan

    ZYNQ UART Issue

    Dear @Ana-Maria Balas, Thankyou so much for reaching out to me. Well i have resolved my issue. There was a problem in attached board support package, I resolved it now my terminal is displaying "HELLO WORLD". Thanks Irfan
  2. Irfan

    ZYNQ UART Issue

    Dear, I am trying to run UART on ZYNQ , i did all the same configurations in vivado and make a bit file then i export into SDK and try to run the HELLO WORLD program everything looks fine but HELLO WORLD isnt displaying on my console. Here's are the attached SDK log files , Kindly review it 16:56:52 INFO : Registering command handlers for SDK TCF services 16:56:52 INFO : Launching XSCT server: xsct.bat -interactive D:\Zynq_project\project_10\project_10.sdk\temp_xsdb_launch_script.tcl 16:56:54 INFO : XSCT server has started successfully. 16:56:54 INFO : Successfully done setting XSCT server connection channel 16:56:54 INFO : Successfully done setting SDK workspace 16:56:54 INFO : Processing command line option -hwspec D:/Zynq_project/project_10/project_10.sdk/LED_DDR_wrapper.hdf. 16:56:54 INFO : Checking for hwspec changes in the project LED_DDR_wrapper_hw_platform_0. 16:56:56 INFO : SDK has detected change in the last modified timestamps for source hardware specification file Source:1572263635926, Project:1572250427565 16:56:56 INFO : The hardware specification for project 'LED_DDR_wrapper_hw_platform_0' is different from D:/Zynq_project/project_10/project_10.sdk/LED_DDR_wrapper.hdf. 16:56:56 INFO : Copied contents of D:/Zynq_project/project_10/project_10.sdk/LED_DDR_wrapper.hdf into \LED_DDR_wrapper_hw_platform_0\system.hdf. 16:56:58 INFO : Synchronizing projects in the workspace with the hardware platform specification changes. 16:57:01 INFO : 16:57:02 INFO : Updating hardware inferred compiler options for ledDDRSetting. 16:57:02 INFO : Clearing existing target manager status. 17:00:08 INFO : Connected to target on host '127.0.0.1' and port '3121'. 17:00:08 INFO : 'targets -set -filter {jtag_cable_name =~ "Platform Cable USB II 0000150f4df101" && level==0} -index 1' command is executed. 17:00:46 INFO : FPGA configured successfully with bitstream "D:/Zynq_project/project_10/project_10.sdk/LED_DDR_wrapper_hw_platform_0/LED_DDR_wrapper.bit" 17:01:00 INFO : 'targets -set -filter {jtag_cable_name =~ "Platform Cable USB II 0000150f4df101" && level==0} -index 1' command is executed. 17:01:00 INFO : 'fpga -state' command is executed. 17:01:00 INFO : Connected to target on host '127.0.0.1' and port '3121'. 17:01:00 INFO : Jtag cable 'Platform Cable USB II 0000150f4df101' is selected. 17:01:00 INFO : 'jtag frequency' command is executed. 17:01:00 INFO : Sourcing of 'D:/Zynq_project/project_10/project_10.sdk/LED_DDR_wrapper_hw_platform_0/ps7_init.tcl' is done. 17:01:00 INFO : Context for 'APU' is selected. 17:01:00 INFO : Hardware design information is loaded from 'D:/Zynq_project/project_10/project_10.sdk/LED_DDR_wrapper_hw_platform_0/system.hdf'. 17:01:00 INFO : 'configparams force-mem-access 1' command is executed. 17:01:00 INFO : Context for 'APU' is selected. 17:01:00 INFO : 'stop' command is executed. 17:01:01 INFO : 'ps7_init' command is executed. 17:01:01 INFO : 'ps7_post_config' command is executed. 17:01:01 INFO : Context for processor 'ps7_cortexa9_0' is selected. 17:01:01 INFO : Processor reset is completed for 'ps7_cortexa9_0'. 17:01:01 INFO : Context for processor 'ps7_cortexa9_0' is selected. 17:01:02 INFO : The application 'D:/Zynq_project/project_10/project_10.sdk/tryfsddfg/Debug/tryfsddfg.elf' is downloaded to processor 'ps7_cortexa9_0'. 17:01:02 INFO : 'configparams force-mem-access 0' command is executed. 17:01:02 INFO : ----------------XSDB Script---------------- connect -url tcp:127.0.0.1:3121 source D:/Zynq_project/project_10/project_10.sdk/LED_DDR_wrapper_hw_platform_0/ps7_init.tcl targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Platform Cable USB II 0000150f4df101"} -index 0 loadhw -hw D:/Zynq_project/project_10/project_10.sdk/LED_DDR_wrapper_hw_platform_0/system.hdf -mem-ranges configparams force-mem-access 1 targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Platform Cable USB II 0000150f4df101"} -index 0 stop ps7_init ps7_post_config targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Platform Cable USB II 0000150f4df101"} -index 0 rst -processor targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Platform Cable USB II 0000150f4df101"} -index 0 dow D:/Zynq_project/project_10/project_10.sdk/tryfsddfg/Debug/tryfsddfg.elf configparams force-mem-access 0 ----------------End of Script---------------- 17:01:02 INFO : Context for processor 'ps7_cortexa9_0' is selected. 17:01:02 INFO : 'con' command is executed. 17:01:02 INFO : ----------------XSDB Script (After Launch)---------------- targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Platform Cable USB II 0000150f4df101"} -index 0 con ----------------End of Script---------------- 17:01:02 INFO : Disconnected from the channel tcfchan#1. waiting for your response IRFAN