The frequency fine tuning actually worked quite nicely. Thanks again!
I measured the temporal drift with respect to a Stanford Signal Generator (SG384). In the 1 to 100 kHz range, the relative mismatch of the clocks was about 1e-6 (i.e. 1 kHz on the DD was about 0.99988 kHz on the SG). In the MHz regime (actually, 5.204 MHz), we could then see phase instabilities with transient drifts of about one 192 ns cycle over a few seconds to minutes.
For the actual experiment, this was of no importance, since the setup was re-triggered at 1 kHz.
We could see, however, that the "wait time" between the trigger of the logic analyzer and the pattern generator introduces a relative jitter of about 1e-3. To circumvent, we installed an external Delay Generator (DG584) to "jump" over 200 µs, and used the DD to generate the desired pulse patterns (to then gate a detector).
We will certainly make much more use of this device in the future