chaitusvk

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  1. HI , i want to use GPS Pmod for time reading In indoor , i have GPS external antenna Does Pmod have SMA connector built ? or any suggestion to connection external active antenna
  2. Able to generate with help of hysc , vsync and pixel clock
  3. I am working with Zybo Z7 board i wan to generate interlaced video does it support it
  4. Hi, i am newbie in video processing on fpga , started with Zybo z7 demo ..afte going through this blog post Adam Taylor video tutorials i made it working At present my project is to generate text overaly like this Adam Taylor Text overlay i have this tutorial Zybo test pattren generator Just small design with 1.Test pattren generator 2. VTC 3. Axi to RGB 4. RGB to DVI clk speed i choose 148.5Mhz dedrived from 100mhz of processor With this design i ended up in Timing Not met error .... my Questions are 1. Do you use any xdc const
  5. Thank you very much @[email protected] you are a great mentor ... i have solved it ...it is issue of async counter module decade_counter( input clk, input reset, input load, input[3:0] data, output [3:0] hours_u_count ); reg[3:0] count; [email protected](negedge clk or posedge load or posedge reset) begin if(reset) count <= 4'b0000; else begin if(load) begin count <= data ; end else begin if(count == 4'b1001) count <= 4'b0000; else count <= count +1; end end
  6. Thank you @[email protected] .. Sorry for my poor description i figured it out today .. . i am connecting one of pins(Mark) of my IP to interrupt of processor if i remove this evering is working fine ..for 1hour ... i think this is beacuse of Infering latches ..please confirm me .. if i connect it my ip to interrupt pin of processor it will be power down my ip with in 5 minutes ... Thank you .....
  7. Hi @[email protected], I am decoding IRIG signal ,some times all my outputs dissapper , 1. when i remove unused register it was working fine . in my fsm there are states where reaching is not trivial only are 1hour i can reach the state ... 2. when i dont connect all output signals in xdc file also leads to disaapring of signals 3. is there any racing condition ... please help me ...
  8. I am folowing this Interrupt Tutorial I am not able to find arch/Kconfig file in petalnux project files ...please suggest me where i have to look how to enable
  9. Thanks @lonel i migrated to uio drivers from custom they now working Thanks for the support ...
  10. Thank @lonel 1. I did not understand compatble string ...i am newbie 2. i have not opened the device in wite mode opened in only read mode. 3. hellosim just opens and reads the device. 4. In simmod read ie. Kernel driver i am reading membase address .. my main probelm is if i dont include the device in Device tree i am able to read the Device perfectly . but i need to read Device on interrupt so i added it to Device tree . When i add it to Device Tree Device, Base mem Address is becmming NULL i dont know i to add Device to Device
  11. Hi I made a custom axi counter which interupts processor for every 1 sec , i read counter value through axi bus , i have written driver for reading BASE_reg of axi peripheral which is working fine. when i activate interrupt by including the deatils of peripheral in system when i activate interrupt through system-user.dtsi iam not able to read the device .... my acces to axi_peripheral register is blocked please help me how to access the axi_register while enabling the interrupt system-user.dtsi simmod.c
  12. Rather than using the BSP's you have to create your own hard ware ... use petalinux-config --get-hw-description=<PATH TO design_1_wrapper_hw_platform_0> I wish the following videos sloves your problem