Sampling rate isn't specifically an FPGA issue. Having external clock inputs and outputs isn't just about clock synchronization.
Imagine that you a system with one of the components an FPGA based board with ADC and DAC capability. There are a number of reasons why you might need coherent system wide sampling. If your ADC is converting a signal generated by a system DAC you might have phasing requirements. An external clock input allows your FPGA platform to have an Fs that is more accurate or steady over time or environmental fluctuations than what the board vendor can provide for a reasonable cost. Sytem Fs might not be constant over the measurement interval. Fs might not originate on one FPGA board. You might not have only one FPGA based board with converters in a system. Clocking is the very basic place where systems engineering starts.
As a purely educational platform not having external clocking access might be fine, for a limited set of purposes. As a working platform this might be a huge problem. A couple of SMA connectors certainly isn't a prohibitive additive cost for something that the Eclypse-Z7 aspires to be. Not all customers of low cost FPGA platforms have simple educational projects in mind.
The Eclypse-Z7 is Digilent's foray into SYZYGY compatibility. SYZYGY is a standard that let's Xilinx customers use the Series 7 IO to all of its capabilities with relatively low cost and high performance headers. Customers can use pods available in the market place or create their own custom pods within a tight budget ( not that these connectors are trivial to lay out using free PCB tools or for low layer count board design ). Digilent is free to pursue whatever market strategy they choose to. FPGA board users are a diverse group and just want to be able to use FPGA device features to accomplish a task. I don't speak for Digilent or any other vendor. I speak on behalf of their customers and users. As a user I don't want to buy a platform that is designed to limit its usefulness, especially when there isn't a cost or technical justification for doing so.
