thank you for your response, I appreciate it very much! You're right, just using LVDS is not enough, I was just trying to see if there were maximum speed tests on that interface. At the end I'm planning to use JESD204B for this application, since that interface was design for this type of requirements. The Cora z7 board is just for testing, in the future we will be building our own board for the acquisition system we want to implement.
I'm new to this JESD204B protocol/interface but I know that it has a lot of advantages and a lot of Analog Devices high speed ADCs use it, that's why I want to use that. There are some problems using the Cora z7 that I found, it seems that the traces that goes to the PMOD connectors are designed for LVDS, so it is a different impedance matching. I guess if I adapt it well on the other side the JESD204B could be used (it seems that they use CML interfaces for the data lines in this JESD204B protocol). And also you're right on the clock issue, I didn't see if any of the PMOD pins goes to any clock pin, I will have to check this also.
We will be doing some tests in the next days, I will post our results here so you can see it and maybe help me with some questions.
Thank you again.