pgmaser

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  1. Hi All, Phil here again. I have Spartan®-3E 1600 FPGA Starter Kit board and it LCD on it. The first problem I am having missing the FPGA pin number for LED 0. Tried the Xilinx the Spartan 3E manual. All the LEDs in this datasheet are wrong. The PCB board is correct. However, I can't read the LED(0) number. Any ideas, if one does not know about these pins. Maybe there are tools that I could use to narrow down the possible location of this LED 0 pad on this PCB. Looking for the FPGA pad number? Thanks. The second thing I would like to do. Writing to the LCD in 4-bit mode and turning off the memory chip in the process. CE of the memory is vital as well as the display. Not sure how when the memory is addressed for the FPGA chip. Either way, I would love to write to this display while the memory is not being used. and go back to a high impedance state when not writing to display. I guess I am looking for the timing diagram for the LCD display and memory. Thanks. The third item I am having is how does this Cool Runner II CPLD on this board work. It appears it's hanging out on the upper ram and rom memories. Does anyone have this JED Code for this CPLD? Can I extract the code from the JTAG link and display it in VHDL using ISE tools? Is this chip necessary to have in production runs? Are the newer board build with this in place? Thanks for your help. Soon I will be in the Spartan 7 stuff. I have legacy equipment that I am still supporting. Spartan 3 stuff. One day we can push for the newer stuff. I use trainers to keep current somewhat? Phil
  2. Hi All, Its been a while in setting up Compilers and Synthesizers. No problem setting up the Spartan 3E 1600 it was on the list in ISE 14.7. However, the Spartan®-3 FPGA Starter Kit board has a four-character, seven segments LED display controlled by Spartan 3 FPGA is not on the list. What would it take to build up a library or configuration in ISE 14.7 . to select this Spartan 3 Board. Characteristics the compiler needs Chip and Package number as well as the Temp Code, maybe. Most importantly it needs to know where Jtag is and how it's connected. RAM and ROM chips and addresses going to the FPGA. There is a place for New and Old Starter Kits. However, that has failed to work plus Xilinx has no way of knowing where the ROM and RAM not unless I share this in the UCF file. The data sheet has the DRAM not sure if the PROM is list or JTAG I am not sure how to set this up. I have the User Guide here. No real instructions on how to build this list of custom or pre-bought boards for the ISE 14.7. The error I am getting is program failed to load. Any help would be appreciated! Phil
  3. Very nice zygot, FPGA Boards with Arm processors is one design type. FPGA boards with soft processors is another. I have an old Spartan 3E I was playing with an Ethernet port RS232, VGA and PS2 all of which I would like to write code for just to get the feel of this project. Basic keypad, LCD with ethernet or RS232 as a com. I only see this being done with a soft processor. I don't believe this PHY is connected to the core. I have not been able to find any IP or C that would allow this port to be initialized. I did find some basic RS232 code. They broke it done nicely into a state machine with a test bench. Very hard to get started with FPGA huge learning curve and if you through a processor into the mix now one needs to write c code and HDL to maintain the form. My point being. I do like the idea of writing all HDL code no soft processor. On the other hand, I see the ARM with an FPGA as easier flow in the design. A lot of times we will have a floating point processor and timing constraints. IO is a really big point here and with this comes floating measurement then the math. Special control system applications. State Machine and Laplacian filters and control system structures. Hardware IO is one state. Software design and Matlab tools for solving math would be a need as well. All of it needs to be integrated via HDL and or C. Do compilers provide the Floating point Processor or is this soft or hard? If one needed an OS like Linux or Real-Time Solution along with Hardware FPGA and ARM. Now it gets even more complex. My whole point --- has does one get or find the IP's to push this product through fast. Ethernet chip from microchip has a lot of complexity someone out there must have an IP module or Component for this. VGA appears to be timing in HDL not to bad. Same as RS232 if one can get Baud Rate Right? Diglent has provided a basic platform, SPI and I2C would nice as well for the PMOD's. Right now basic steps getting LCD and Keyboard to work with HDL possible RS232. This should be fairly straight forward. Then integrated soft processor like MicroBlaze and working with SDK... Does the free Version of Xilinx work with this type applications or is it the paid version? Signing out -- Any links to code development for this bard would be a plus. Also, I notice extra FPGA's on the board. I don't have any code for this not sure what this is about. USB JTAG is one and another might be memory map? If I was going to route my own board, I don't think I would include these extra FPGA's on a new board any ideas on this?
  4. Xilinx Tools FPGA and ARM Coding? How does one program the newer boards with HDL and C coding on one platform? Do the tools support both processor and VHDL or Verilog? I don't see the big picture here. I am working the Spartan 3 and 6 designs. I would like to move into the Artix 7 at some point. I need a working platform for USB 3.0 and Ethenet 1 G. Phil