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About WillTx

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  1. Solved, issue with manually generating the design wrapper file. Had to let it do it automatically to figure out what it wanted.
  2. Please, confirm that I don't need to worry about the following critical warning message: I tried removing the "jb" port interface that was automatically added when adding the MTDS IP and then generating a new interface type Digilent PMOD. That resulted in a port interface that is named just like in your block diagram but still doesn't work. Synthesis and implementation complete fine but Bitgen still fails the same way: At this point, I have no clues of what the issue is and I'm out of ideas.
  3. Hi Ana-Maria, I do have all the board files installed. And I did manage to get Vivado to hold the Board value so now I can see the board tab. But adding the PMOD through the board as in the tutorial introduces a different set of issues. I have created a new project with only the MTDS PMOD to simplify the design. In the first image you can see the critical warnings, the first set is related to DDR negative slack, known issue with the Cora board. The last one is the one I referred to related to ext_spi_clk. This has nothing to do with me, it is because of some constraint in the PMOD O
  4. Hi Ana Maria, thank you for such a detail answer, really appreciate it. I'm familiar with all the documents you mentioned above but still having issues getting the display to work. I'm prototyping a design that already have a couple of different PMODs and everything was working fine but adding the display has been a challenge. I ended up adding the pinout manually to the XDC file not the way you show above but like this: set_property -dict { PACKAGE_PIN W14 IOSTANDARD LVCMOS33 } [get_ports { MTDS_Pmod_out_0_pin1_o }]; #IO_L8P_T1_34 Sch=jb_p[1] I had to figure out which pins were
  5. Trying to connect the MTDS PMOD to my CoraZ7-07S FPGA board. I used the Digilent MTDS IP but I'm having trouble figuring out how to connect it to PMOD port JB on the Cora board. Read on another answer that I should use JD by default but that's not an option in Cora. Vivado (2019.1) also warns that the IP was packaged for arty board but assume that's not an issue for me other than the JD issue. I saw on another post that I need to edit the XDC file to change the PMOD connector but I don't see how I can do that since the MTDS PMOD doesn't show on my constrains file. Thinking about wiring it