shahad

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  1. shahad

    MicroBlaze code

    Hi Thank you very much @jpeyron for your response to my previous question, I have completed the design with the existence of MicroBlaze as shown in the Fig. below, but I need a code in the c language for MicroBlaze to complete the project please help me to get this code. Thank you
  2. Hi @jpeyron Thank you very much for your response to my previous question, I have completed the design with the existence of MicroBlaze as shown in the Fig. below, but I need a code in the c language for MicroBlaze to complete the project please help me to get this code. Thank you
  3. @jpeyron Thank you very much for your cooperation
  4. Hi I designed a project in the Xilinx blocks then convert it to Vivado 2017.4 as IP, The problem is, i cant make synchronization between TX and RX by using the two FPGA Nexys4 DDR, Can I use the USB-UART Bridge (J6) to solve this problem? Note that neither microblaze nor the axi is used
  5. Hi I designed a project in the Xilinx blocks then convert it to Vivado 2017.4 as IP, The problem is, i cant make synchronization between TX and RX by using the two FPGA Nexys4 DDR, Can I use the USB-UART Bridge (J6) to solve this problem? Note that neither microblaze nor the axi is used