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Grensv

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Everything posted by Grensv

  1. OK, Problem solved, thanks to a colleague at Grenoble-Alpes university. This issue is related to separators in files, which can cause problem with regional settings of Linux. Changing my settings from fr_FR to en_US solves the problem. It is still strange that the Zybo board files work fine in fr_FR, and not the ZyboZ7.
  2. Hi @JColvin, Thank you for your answer. I gave a try with Arty Z7-20 and Vivado 2020.2 Linux. Seems to work properly: with just the Zynq IP, no strange things after running automation, generation of BD, synthesis and implementation are running flawless. See screenshot of the clocks: no error with ENET0. I couldn't test it for real: I don't have any Arty. About the Zybo: it works fine with Zybo, error is on both ZyboZ7-10 and Z7-20. We have to admit that the bug is specific to the Linux version, but it's quite frightening that such weird behavior can happen from one version to another Vincent.
  3. I tested today on Windows. I can confirm that the problem is only with 2020.2 Linux, ZyboZ7 (no problem with Zybo) It looks like something in the presets files of the Z7 prevents the automation to use it properly. Therefore, it just presets nothing. If I open a project generated with windows version, or if I apply a TCL preset script (see attached .tcl file) made with the windows version, there is still a problem on the Linux version, which may be a hint for that problem: the ENET0 clock is in error state. See screenshot: A possibility would be to use the ARM PLL instead of the IO PLL, but it has consequences on other clocks: Zynq_ZyboZ7_IPinit.tcl
  4. I am currently having the exact same problems, with Vivado 2020.2, running on a LINUX (like Mohammadhgh) and the ZYBO Z7. I don't remember such thing with 2020.2 on Windows (going to give it a try). No such problem with an other Digilent board like the Cora Z7. The facts with the Zybo Z7 : - I have the board files properly installed, - the checkbox "Apply Board preset" is well checked when doing automation, - when configuring the Zynq IP, everything is empty (No UART, NO GPIOs etc...), hence it synthesizes with warnings and doesn't work afterwards with Vitis (mem crashes...) It seems something could be wrong with Vivado 2020.2 Linux (https://forums.xilinx.com/t5/Embedded-Development-Tools/Zybo-7Z-HelloWorld-fails-to-execute-consistently-Vivado-Vitis/m-p/1242056) but I think something may be wrong too (or incompatible), with the board definitions of the Zybo, because this does not happen with the Cora Z7. Thanks, Vincent.
  5. Grensv

    ATMEL USB firmware

    Hello, I am having the exact same problem as Vijay, I need the firmware for the ATMEL usb chip of the board. I have already installed the Digilent flash tool, and try to get the firmware from a functional board, but it is of course read protected. Best regards, Vincent.
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