tahoe250

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  1. That did the trick. I really appreciate your help!
  2. I am going through UG585 document and trying to understand the formulas for the can bus baud rate. I am using the example from SDK (xcanps_intr_example). I am trying to understand how they are arriving at those numbers. Ultimately I would like to set up the baud rate at 1 megabit per second. /* * The Baud Rate Prescaler Register (BRPR) and Bit Timing Register (BTR) * are setup such that CAN baud rate equals 40Kbps, assuming that the * the CAN clock is 24MHz. The user needs to modify these values based on * the desired baud rate and the CAN clock frequency. For more information * see the CAN 2.0A, CAN 2.0B, ISO 11898-1 specifications. */ /* * Timing parameters to be set in the Bit Timing Register (BTR). * These values are for a 40 Kbps baudrate assuming the CAN input clock * frequency is 24 MHz. */ #define TEST_BTR_SYNCJUMPWIDTH 3 #define TEST_BTR_SECOND_TIMESEGMENT 2 #define TEST_BTR_FIRST_TIMESEGMENT 15 /* * The Baud rate Prescalar value in the Baud Rate Prescaler Register * needs to be set based on the input clock frequency to the CAN core and * the desired CAN baud rate. * This value is for a 40 Kbps baudrate assuming the CAN input clock frequency * is 24 MHz. */ #define TEST_BRPR_BAUD_PRESCALAR 29 Formulas from the UG585: tTQ_CLK = tCAN_REF_CLK * (can.BRPR[BRP] + 1) freqTQ_CLK = freqCAN_REF_CLK / (can.BRPR[BRP] + 1) tSYNC_SEGMENT = 1 * tTQ_CLK tTIME_SEGMENT1 = tTQ_CLK * (can.BTR[TS1] + 1) tTIME_SEGMENT2 = tTQ_CLK * (can.BTR[TS2] + 1) tBIT_RATE = tSYNC_SEGMENT + tTIME_SEGMENT1 + tTIME_SEGMENT2 freqBIT_RATE = freqCAN_REF_CLK / ((can.BRPR[BRP] + 1) * (3 + can.BTR[TS1] + can.BTR[TS2])) How are they deriving those numbers? How do I choose BRP? How are they getting TEST_BTR_SYNCJUMPWIDTH, TEST_BTR_SECOND_TIMESEGMENT and TEST_BTR_FIRST_TIMESEGMENT.
  3. tahoe250

    CAN Bus

    I am using zybo Z7-7020 version and trying to use the CAN bus on the PS side. I am enabling the EMIO such that the TX and RX are landing on the PMOD connector (JC). I have verified that the bare metal application is working loopback mode. With an external CAN bus transceiver wired between the zybo board and another CAN bus node. The other node is sending messages and the zybo board is just waiting to receive the message. In Vivado I have configured the CAN CLK as such please refer to the attached. I have change the SDK interrupt example not to send out any CAN bus messages and also changed it to normal mode. Basically just trying to receive CAN messages. At the moment the receive ISR is not working. What could I be missing? CANBusZybo.docx
  4. Hello everyone, I am new to Petalinux. I have couple of questions. I am using PetaLinux SDK version "2018.3 when I do petalinux-config --get-hw-description=../ i get the following: WARNING: Your PetaLinux project was last modified by PetaLinux SDK version "2017.4", WARNING: however, you are using PetaLinux SDK version "2018.3". Please input "y" to continue. Otherwise it will exit![n]y When config manager comes up I hit ESC then this prints out INFO: Getting hardware description... INFO: Rename design_1_wrapper.hdf to system.hdf [INFO] generating Kconfig for project [INFO] menuconfig project *** End of the configuration. *** Execute 'make' to start the build or try 'make help'. [INFO] sourcing bitbake [INFO] generating plnxtool conf [INFO] generating meta-plnx-generated layer [INFO] generating machine configuration [INFO] generating bbappends for project . This may take time ! [INFO] generating u-boot configuration files [INFO] generating kernel configuration files [INFO] generating kconfig for Rootfs Traceback (most recent call last): File "rootfs_config.py", line 315, in <module> parse_args(sys.argv[1:]) File "rootfs_config.py", line 290, in parse_args extract_packages_dot(packages_user) File "rootfs_config.py", line 257, in extract_packages_dot with open(packages_dot,'r') as fp: IOError: [Errno 2] No such file or directory: '/home/iaguilar/Desktop/ZyboLinux/zyboBase/project-spec/meta-user/recipes-core/images/petalinux-image-full.bbappend' ERROR: Failed to generate rootfs /home/iaguilar/Desktop/ZyboLinux/zyboBase/build/misc/rootfs_config/Kconfig.user ERROR: Failed to config project. ERROR: Get hw description Failed!. Do I have to upgrade the bsp to PetaLinux SDK version "2018.3"? Is that why these errors are occurring ?
  5. I am looking for tutorial that guides through the entire flow. Meaning, create a vivado project then create a linux image based on that hardware design. I am trying to figure how to write an application that would access my custom HDL module through Linux. I have already verified that my custom HDL module works through the AXI lite bus interface. I created a bare metal application to test my custom HDL module and everything works as I expect it. So, the next step would be doing the same through a Linux application. Hope that makes sense. Also, I am currently working with vivado within Windows 10 would it make more sense to install vivado on a Linux Box? I have gone through this tutorial: https://github.com/Digilent/Petalinux-Zybo-Z7-20/blob/master/README.md?_ga=2.65706535.861548781.1558477480-254828324.1551742247 Basically, installed Petalinux on VM linux box. Another thing, I had a really hard time installing Petalinux on Ubuntu 18.04.2. I gave up and went to 16.04.4 then seems to work just fine. Not sure if I understand that one. Any guidance would be tremendously appreciated. P.S I am currently using Zybo-Z7 20 board