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    sy2002 reacted to [email protected] in Enough Current to Drive microSDHC on a Nexys 4 DDR?   
    I would be quite surprised if the FPGA is driving the power of the SD Card at all!  The IO ports on the card are not suitable for power supplies. 
    If you look at a full-size SD memory card, there are 8 wires in a line, numbered one to eight from the left corner with the diagonal on it to the right, and a ninth wire offset from the others in the diagonal area.  Of these wires, wire 4 is supposed to be connected to power, 3 and 6 to ground.  These are not the FPGA I/O pins at all, but rather just a part of a functioning card interface.  The micro SD cards are similar, save two exceptions.  The first is that there are only eight pins, and hence there's only one power and one ground pin.  The second exception is that my SD card manual doesn't show a picture of them.     Further, in proper protocol fashion, all four of the data lines are supposed to have pull up resistors (this includes the chip select SD_DAT3, as well as SD_DAT0/MISO), and the same with the command line (SD_CMD/MOSI).  Finally, when I examine the Nexys 4 DDR schematic, I find this to be how the Nexys is wired.  (Well done, Digilent!  )  Further, if you look at the SD_RESET wire, it simply controls a transistor determining whether or not mains power is fed to the micro SD card or not.  Hence asserting the RESET control is the same as pulling power from the card (highly discouraged when the card is in operation, since it can lead to unrecoverable bad sectors ...)
    Thus, increasing the drive strength on the I/O wires will do nothing to power your SD card.
    Plugging your board into a wall power supply, on the other hand, will do everything to power your SD card.
    If you are concerned at all about the on-board power supply, I would consider looking into the XADC functionality of the Artix chip to see if you can measure the power supply voltage, and the current usage, and to see whether or not the power is indeed dropping during the times you think it is.
    Just my two cents, and I hope this helps,
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    sy2002 got a reaction from TommyK in Is the Nexys 4 DDR to SRAM component really that slow?   
    Thank you for the hint about the looperdemo!
    (BTW: I already up-voted your first answer, but the system is showing this question still as "has no best answer" - no idea why)
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    sy2002 reacted to TommyK in Is the Nexys 4 DDR to SRAM component really that slow?   
    Good luck! I used Mihaita's code to create a wider memory interface in my Nexys Video looper project. Take a look at it if you're having trouble!
  4. Like
    sy2002 reacted to TommyK in Is the Nexys 4 DDR to SRAM component really that slow?   
    Hi Mirko,
    From what I understand of Mihata's code, the RAM2DDR module was created to interface with the DDR like you would SRAM. It is designed to send only one 16bit word at a time using masks. You can send up to 64bits of data at a time (or 128bits with PHY to controller clock ratio at 4:1) using the MIG interface.
    Lets say you are working with 64bit bursts:
    Your ram_dq_i and o will be 64 bits You will set the data mask (wdf_data_mask) to all 1's (or disable it in the MIG settings) You will change how the addressing works. Mihaita does some bit manipulation to simulate 8bit addresses (it actually writes to the same address with different bit masks). In our case, we would simply send the 64 bit data (with wdf_data_mask set to all 1's, it will send the full 64bits). DDR memory is better used when you burst read or write, rather than reading/writing one 16bit word at a time.
    Hope this helps!