m72

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  1. Hello! WF 3.13.18, Windows 7, x64 Under some conditions, the pattern generator produces glitches at the end of the sequence. I think that in the "Auto" mode the field "Run" should be rounded down. An example with this effect in attachment. The DIO0 pin is connected to the first channel of the oscilloscope. With best regards, Mikhail. glitch.dwf3work
  2. Hello! WaveForms 3.13.16, Windows 7, x64. Speed test with Digital Discovery fails. 😞 With Analog Discovery works fine. Latency 0.15...0.20 ms, to device 20...25 MBps, from device 29...41 MBps. Some problems with 125 MHz base frequency in Digital Dicovery after reconnection (for example after failed "speed test") found. The kernel frequency is set to 125 MHz. Ok! The "Patterns" tab generates *1.25 faster than required. Clock 1MHz -> 1.25 MHz. In the "Logic" tab maximum sampling frequency in the list is "800 MHz", but the measurements are right "1.25MHz". Work around: after reconnect Digital Discovery it is need to "rechange" base frequency in the "Supplies" tab (step down and step up is enougth). With best regards, Mikhail.
  3. Hello! WF 3.11.24, AD2, Windows 7, x64 On save/load or when I clone the scope relative cursors go wrong. It happens if reference cursor number is greater than current. With best regards, Mikhail. scope_clone.dwf3work
  4. Hello! Yes of course. I have used it. With best regards, Mikhail.
  5. Hello! Digital Discovery, WaveForms from 3.11.18, Windows 7 x64. When allow "Logic Analyzer" from "Protocol" by default it change DIO24 -> DIN0 (mode 800 MHZ, DIO0..7). If start "Logic Analyzer" at "200 MHz, DIN0...DIN23, DIO24...DIO31" it change sample rate "100...400MHz" -> "800 MHz" and change DIO24 -> DIN0. If start "Logic Analyzer" at "400 MHz, DIO24...DIO39" it change sample rate "100...400MHz" -> "800 MHz" and make DIO >= 32 "not available". And after that "800 MHz" -> "400 MHz" moves DIO32 -> DIO24 and DIO33 also to DIO24. With best regards, Mikhail.
  6. Hello! Just tested it with simplest settings (attenuation 1X, 50 ns/div, zero signal). Only offset on the screen is changed. Scope1 ... Scope3. 1. It happens only with second channel. 2. When offset is [-2.34V ... -1.76V]. 3. At the borders noise is like a rare peaks. At the center like as an ADC input is overloaded. 4. Peaks values are -7.6V & +7.6V. Scope4. 1. Offset -4V 2. But signal is not zero, it is +2V. So it became to the same "- div from the center". Peaks are -5.6V & + 9.6V -> shifted +2.0V. 1V/div, 2V/div, 5V/div - the same situation. Why I am so cycled about calibration. Scope1 LG offset is -0.325 V. Scope1 HG offset is -0.0296 V. Scope2 LG offset is -0.300 V. Scope2 HG offset is -0.0274 V. So signal -2V can be on the edge between "Low Gain" & "High Gain". But because offset is quite big (15% of ADC input, may be damaged?), algorithm can not choose the right gain and generates peaks on switching. By this theory lowest border of the noise is -2.35 V - 0.3 V = - 2.65 V. If signal lower then this it works fine with "Low Gain". A bit upper there is "gray, turbulent zone". And greater than -1.76V the stable zone of "High Gain". With best regards, Mikhail. peaks.dwf3work
  7. Hello! Very very strange. It occurs without any scheme and on different PCs. Only shift level on the screen changes. Conditions: Attenuation 9X...100X & offset -16V ...-24V May be this is an calibration effect? Or it is damaged by high voltage impulse... At zero state second channel on this AD2 is more noisy than first. With best regards, Mikhail. P.S. I often find bugs. Even in such things as TV set, PLC (in Siemens LOGO! One is definitely there), Atmega, etc. 210321ABEEA0.dwf3calib
  8. Hello! Oscilloscope problem. When I shift second channel down - some glitches on the screen occurs. It happens on "two lines down from center" and does not affected by the shift level. With best regards, Mikhail. default.dwf3work
  9. Hello! The initial clock signal level depends on the frequency and phase. With phase == 0 - it works well. With phase = 180 degrees - so-so. (This signal is like a preview). As far as I understand, these are rounding issues. But you must admit that it looks strange: I change the frequency slider - the initial signal level changes. The delay parameter for signals is very useful. But in the general case, it would be nice to set the line state separately. It may have to separately process for each type of signal and even its value. I will try to systematize my experience a bit later. Hmm... The negative delay time is actually "counter init = period - abs(delay)". I think this would be useful for a "custom" signal. Then you can start the signal from the defined "half-bit." It takes some time to think. Best regards, Mikhail. delay_error.dwf3work
  10. Ok. But problem with pulses that start at "High" is present. Line goes High on start ignoring delay settings. And falling down at expected time. P.S. May be it is better to fill delay before pulse with "Idle" value? EMU_2CH_EACH_V10.dwf3work
  11. Thank you! This is an signal emulator for an ultrasound metering system. So I need the best possible delay resolution (10 ns). The "pulse" has it in "simple form" and I can change it precisely for each channel. The bus delay is also good. I just tried it.
  12. Pattern "Pulse". Is it right? I need an 30 us impulse after 120 us delay. DIO0 & DIO1 seems to work right, but I need to set "Counter Init" to 1. I think it works next way: 1. Delay 120 us. 2. Start with zero 3. 1 tick with zero. 4. Pulse 1. DIO2 & DIO3 are strange. EMU_2CH_EACH_V10.dwf3work
  13. Hello! An issue on opening project with two AD2 devices on one computer. Not a big deal. Create project with AD2[1], configuration #4 (logic 16x16k). Save project. A. If open this project with AD2[1], configuration #1: "Project was created with AD2[1] configuration #4. Switch to configuration #4?" -> Yes - > AD2[1] configuration #4. B. If open this project with AD2[2], configuration #1: "Project was created with AD2[1] configuration #4. Switch to this device?" -> No -> AD2[2] configuration #1. C. If open this project in first instance of WF with AD2[1] and try to open in second instance of WF with AD2[2]. "Project was created with AD2[1] configuration #4. Switch to this device?" -> Yes -> "The device is being used by another application. Device programming failed". -> Ok. Side effect: DIO0 -> DIO16, DIO1 -> DIO17 and so on. DIO16 does not exist on AD2. :-) On closing WF saves list of recent files only from last instance. Also not a big deal. 1. Open first WF and create project "A". 2. Open second WF and create project "B". 3. Exit second WF. 4. Exit first WF. Reopen WF and in recent files there is only one project "A". Workaround: open WF, open project "A", open project "B", exit WF. Now recent files list contains "A" & "B". It is good for a next month. With best regards, Mikhail.