dem

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  1. Dear All, For a university project, I am designing the readout electronics for a CCD sensor. I have just a little bit of experience with FPGAs so I need some advice. The detector will have a quite slow pixel rate, maximum a 1 MHz and I will sample it with a 16bit ADC. I (hope) know how to implement the clocking and the ADC interface but I have no ideas on how to transfer the images to the PC. I am planning to scan continuously the detector and when the FPGA receives a trigger it stores an image in a RAM block, after that I don't know how to transfer the content of the RAM to the