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  1. Dear All, For a university project, I am designing the readout electronics for a CCD sensor. I have just a little bit of experience with FPGAs so I need some advice. The detector will have a quite slow pixel rate, maximum a 1 MHz and I will sample it with a 16bit ADC. I (hope) know how to implement the clocking and the ADC interface but I have no ideas on how to transfer the images to the PC. I am planning to scan continuously the detector and when the FPGA receives a trigger it stores an image in a RAM block, after that I don't know how to transfer the content of the RAM to the computer. Originally I simply tough to use a UART (I do not care about the speed, it can take also tens of seconds to transfer an image) but with a UART I can transmit only 8 bits at a time. I also considered the possibility to use a USB FIFO, but I would minimize the electronics as much as possible and use as much as I can the electronics on the demo board (by the way, I am planning to use an Arty A7). There is also the possibility to use the ethernet and a MicroBlaze, but it sounds a little bit complex and I do not really know where to start. What do you suggest? The scope of the project is focused more on the CCD and electronics side, so I should find a simple to implement solution for the communication. Thank you! Cheers PS Do you think that the Arty A7 is enough?