vttay03

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  1. I finally got it running, I think it had to do with the way the project cache was interacting with OOC synthesis runs. In the attached screenshot under Generate Output Products, I changed "Synthesis Options" to "Global" and everything started working suddenly. I think forcing it to re-synthesize everything cleared something. Hoping to be able to revert back to "OOC per IP" to speed up the synthesis process after I get familiar with it all.
  2. I'm trying to integrate a custom IP module (AXI4 peripheral) with the Vivado IP Integrator flow on the Arty-A7 board. I've followed the tutorial outlined here: https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-creating-custom-ip-cores/start I am able to successfully generate a bitstream - my PWM signals should be wired out to the PMOD JB connector. However, nothing works once I try to launch an application from within SDK. Even something as simple as "Hello World" fails to run. The board support package, libraries, and applications all compile without issue. The kicker is that as soon as I revert back to the design WITHOUT the custom IP module, everything works fine and I can run applications from within SDK. Below are screenshots of my block diagram and constraints file. The constraints file only contains the additional information required for the PWM signals, assuming all the rest of the constraints are pulled in from the board file like they are when the custom IP module is not part of the design. Thoughts??? Using Vivado 2017.4
  3. Hi @jpeyron-- Just wanted to follow-up and let you know this all worked after rolling back to 2017.4 and using the offset you provided. Thanks for the help!
  4. Any luck? I tried a few different addresses higher than 0x00C00000 but still not working. I pulled the datasheet for the SPI flash and it looks like the 128 Mb part has addresses up to 0x00FFFFFF. Haven't had time to investigate how to calculate the bitstream size to ensure it's not overwriting the stored application once that's loaded into offset 0x0.
  5. I'm stumped and have been pouring through the posts in these forums over the last couple of days but can't quite get to a solution. I know this has sort of been beaten to death...so take it easy on me. I'm trying to get the Arty A7-100T board to boot from SPI flash on power-up. I'll try to go in the order of which I've configured things as concisely as possible...any insight or help is much appreciated. IP block in Vivado is customized as shown in image below. In addition, I've connected 'ext_spi_clk' to a 50MHz clock generated by the clocking wizard. Bitstream generates successfully and design is exported to SDK. I've run numerous applications out of BRAM and DDR3 via the normal microblaze bootloop (i.e. no flash) so I know the system is configured correctly to some degree. I've tried this both WITH and WITHOUT a compressed bitstream as noted in the tutorial here: https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/start I generated the BSP with xilifs library v5.12 and set 'serial_flash_family' to 5. I then created a user application with a modified linker script to run out of DDR3. I verified this works just fine in the standard microblaze bootlop as noted above. I generated the 'srec_spi_bootloader' application. I originally set the memory location to 0x00C00000, but have since used 0x00300000. Complied the application with no issues. I then generated a bitstream as indicated in the tutorial with the 'srec_spi_bootloader.elf' set to initialize in Block RAM. Followed the steps for programming flash - first loaded the user application at the memory offset that matches the compiled 'srec_spi_bootloader' application (so 0x00300000). Then programmed the generated bitstream at offset 0x0. Originally, I had the wrong memory part selected and have had difficulty finding any documentation that points to the updated part. Ultimately just read the letters on the actual part itself and found that 's25f128sxxxxxx0-spi-x1_x2_x4' worked. So that's what I've been using. After programming and power cycling, I see the DONE LED illuminate but nothing happens. There's been some tweaks to the process here and there, but this seems to be the most convincing order of operations I've been able to find on the web. As an interesting side note, I can load the flash memory with the application at 0x00300000 and run the 'srec_spi_bootloader' out of the microblaze bootloop when it's set to initialize in Block RAM and it loads the application just fine. It's just when I add the step of writing the full bitstream to offset 0x0 that it fails to actually run the application on power-up, despite the fact the green DONE LED illuminates. Any thoughts???? 💡💡💡