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  1. wing

    Reading Pmod AD1 value

    Hi @jpeyron, I am using zedboard zynq-7000. Actually I tried using Pmod IP cores approach before. When I use the library from github: When I added this Pmod it looks like this in vivado: Since from my understanding , the AD1 has CS,D0,D1,CLK,VCC and GND as output and A0,A1, Gnd and Vcc as input pin , I dont quite understand how to connect it to zedboard in IP block... This is totally different from what I understand about AD1, also , what is the different between Pmod_out_pin1_o , Pmod_out_pin1_i and Pmod_out_pin1_t ? Since I get very confuse in IP core approach , I changed to use VHDL and because I originally designed to get value from AD1 and do some calculation using C program, so I need to export to SDK. However , after reading some tutorial about using SPI on zedboard , I am still confuse about it. For the future development of my project , there still a chance that I need to do it on IP core approach. Is there any tutorial about getting data from AD1 using SPI? Btw the example you gave it quite helpful on using VHDL on AD1
  2. wing

    Reading Pmod AD1 value

    Hello , I am using Pmod AD1 to get a analog value from a external sensor. And I am using SPI to receive data from AD1. Now I use JA to connect with AD1 , so : JA1<->CS JA2<->D0 JA3<->D1 JA4<->CLK is this a right approach? I use xdc file to route them: ##Pmod Header JA ##Sch name = JA1 set_property PACKAGE_PIN Y11 [get_ports {ADC_CS}] set_property IOSTANDARD LVCMOS33 [get_ports {ADC_CS}] #Sch name = JA2 set_property PACKAGE_PIN AA11 [get_ports {ADC_D0}] set_property IOSTANDARD LVCMOS33 [get_ports {ADC_D0}] ##Sch name = JA3 set_property PACKAGE_PIN Y10 [get_ports {ADC_D1}] set_property IOSTANDARD LVCMOS33 [get_ports {ADC_D1}] ##Sch name = JA4 set_property PACKAGE_PIN AA9 [get_ports {ADC_SCLK}] set_property IOSTANDARD LVCMOS33 [get_ports {ADC_SCLK}] However, when I export to SDK , I dont know how to read the value from JA2 , is there any examples can show how can I read the value from AD1 via SPI?? I read some of the example but they are all using Pmod as output. sorry for asking dumb questions, I am very new to FPGA