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Ana-Maria Balas

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Everything posted by Ana-Maria Balas

  1. We did not try the image with QEMU. I think it is a problem with the emulator. In the early stage of booting, it cannot determine the necessary resources needed by u-boot, because the QEMU is built for Xilinx QEMU device trees to generate a machine model. Xilinx recommends to use their prebuilt image, which works with QEMU or I think you can integrate the 3eg device tree into QEMU (see here https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/822312999/Building+and+Running+QEMU+from+Source+Code#BuildingandRunningQEMUfromSourceCode-Buildingdevicetreebinaries%3A) You should use their prebuilt image to create compatible Petalinux drivers/applications if it is something not specific to the board. https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/818708631/Chapter+2+-+Building+and+Running+QEMU
  2. Hello @DaleD, Can you try with petalinux-boot --qemu --u-boot Or You can use the built image: petalinux-boot --qemu --image ./images/linux/Image Or If you packaged a prebuilt image petalinux-boot --qemu --prebuilt 2
  3. Hello @afif.ramadhan, I think the parameters are already computed using decutil. See below Quote and example from the IP documentation pdf: You only have to take the processed calibration values using decutil and feed them to the Zmod AWG controller IP. You can load the values using the IP interface or using the external calibration signals through Constant IP blocks. Just to clarify something, through AXI Stream only the sample DATA is sent, not the calibration data.
  4. @HomaGOD, Could you post a screencapture of your whole block design from Vivado? Then screen capture from the Adress Editor tab?
  5. In boot partition please set in uEnv: #Zmod configuratio to use: adc, dac, adc-dac zmod=dac Also go to Petalinux <repo-location>/images/linux/ and copy somewhere the additional files: system.bit and system.dtb then rename them to zm-dac.bit and zm-dac.dtb and then copy these files to boot partition (replace the existing ones). So you have to use all 4 files from <repo-location>/images/linux/: BOOT.BIN image.ub zm-dac.bit zm-dac.dtb
  6. This is happening because the Linux project is using the old hardware. You have to update the Petalinux project with the new hardware I provided here, build it, then you can use the Linux demo application from Xilinx SDK. Follow the steps (see each title below) from readme https://github.com/Digilent/Eclypse-Z7-OS/tree/zmod_dac/master#readme 1. Setup (You have to install Petalinux 2019.1 see Installation Requirements to install all the necessary packages from the table and Run PetaLinux Tools Installer) 2. Source the Petalinux Tools 3. Download the Petalinux Project 4. Next Steps (import the new hardware design provided here into the project to build upon) 5. Build the Petalinux Project 6. I believe you are using our prepared image with Debian 10 rootfs, in this case you only need to replace the BOOT.BIN and image.ub in the boot partition of the SD card with the newly built files located in <repo-location>/images/linux/.
  7. In the Eclypse-SW project, did you right click design_1_wrapper_hw_platform_0 -> Change Hardware Platform Specification -> then selected the downloaded design_1_wrapper.hdf from above? Then regenerate the BSP sources:
  8. Hello @NithinA, I added the changes to the AXI_Zmod_DAC1411 IP on branch feature/zmod-support in vivado-library repository. https://github.com/Digilent/vivado-library/tree/feature/zmod-support If you want to update the hardware project with upgraded IP, you will have to: 1. git checkout the hw for the zmod_dac demo 2. cd into repo/vivado-library 3. git checkout feature/zmod-support with the latest changes 4. go to Vivado tcl console and create the hw project: set argv ""; source digilent-vivado-scripts/digilent-vivado-checkout.tcl 5. in Reports/Report IP Status verify that /ZmodDAC_0/AXI_ZmodDAC1411_v1_0_0 has the Rev.23 (latest revision) 6. generate bitstream 7. update the sw project with new bitstream In case you don't want to follow the above steps for creating the hardware project, here is the new bitstream file for ZmodDAC1411_Demodesign_1_wrapper.hdf.
  9. Hello @Kyle_Jackson, We are looking into this issue. As soon as we discover something, we'll let you know. Thank you, Ana-Maria
  10. Hello @mukunda, Did you manage to find out the problem?
  11. Somehow the hardware project it is not configured properly for your board. You can check that by seeing if the DONE LED is turning GREEN for the BOOT.bin you got. Let me know
  12. When you create a HW project in Vivado, you have to configure the Zynq. Since you are using a Petalinux build, the UART channel is enabled for sure in Zynq. However I've built 2 demos to test the UART, because I don't know which Zybo Z7 you have. These are the files, select the one for you board: Zybo_Z7_10.bin Zybo_Z7_20.bin I'm using: I know for sure that these 2 demos are working. Copy the .bin file to an empty SD card, rename the file to BOOT.bin, JP5 jumper set to SD on the board, wait for the DONE LED to become green. Press PS-SRST button to show the message multiple times on the serial console. Let me know what you see
  13. So let me understand, you can program the board via JTAG using the micro USB cable but you cannot access the serial port. 1. With the Virtual machine, you have to be careful to allow the USB devices to be connected to your VM. If the USB device is connected to the VM, then you cannot access it from Windows and if the USB device is connected to Windows, then you cannot access it from VM, in your case from Linux and that is why it is not detected. 2. Did you enable the UART MIO channel in Zynq ?
  14. Hello @TF1999, Do you succeed to program the board via JTAG, and not boot from QSPI or SD card?
  15. Hello @engrpetero, Yes, you should check the Technical Reference Manual https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf at Chapter 8. Also more details about the clocks for Zybo are found in the Reference Manual https://reference.digilentinc.com/reference/programmable-logic/zybo-z7/reference-manual#oscillatorsclocks
  16. Hello @elAmericano, Here is the github location of the IP library. As you can see we currently don't have an IP for this Pmod. However the Pmod is using SPI protocol. You could easily add an Axi Quad SPI IP and then constrain the outputs, the in SDK you can adapt the code from SPI Ethernet ENC24J600 Library which is made for PIC and use it. As you can see SPI Ethernet ENC24J600 Library supports ENC424J600 module, which is the module used by Pmod NIC100. For SPI communication there are several Pmods that have SPI drivers ( see git location ) which you can take as an example. It's a bit of work, but maybe it could be a great opportunity for you to learn something new. Best regards, Ana-Maria
  17. Hello @Leo_W, I wrote to you a private message regarding this issue.
  18. Hello @cwerner77, We'll have to investigate the issue. I'll get back to you as soon as I have an answer. Thank you, Ana-Maria
  19. Ana-Maria Balas

    ZYNQ UART Issue

    Hello @Irfan, Which board are you using ? Also could you post a screenshot of your block design ? Cheers, Ana-Maria
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