MMateos

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  1. Hello, I am designing a project in which I need to register the input from a 4x4 matrix KeyPad (this model) and to do so I have written the following VHDL test code: library IEEE; use IEEE.STD_LOGIC_1164.ALL; entity Display is Port ( selected : in std_logic; Row_Vector : in std_logic_vector(3 downto 0); Col_Vector : in std_logic_vector(3 downto 0); display_code : out std_logic_vector(6 downto 0); display_ctrl : out std_logic_vector(3 downto 0) ); end Display; architecture Behavioral of