Hello Jon. I have been following the tutorial. I have extracted the "vivado-library-2018.2-1.zip" again, keeping the complete path and complete library (previously I only extracted the PmodOLEDrgb folder), and now the connection automation does indeed connect the output port with the "JA" connector.
However, I get errors when I try and synthesize (hardware is the Cora7s platform), where it reports the following error:
[IP_Flow 19-157] Failed to copy file from 'c:/MyDesigns/DigilentIP/vivado-library/ip/Pmods/pmodOLEDrgb_v1_0/ip/PmodOLEDrgb_axi_quad_spi_0_0/PmodOLEDrgb_axi_quad_spi_0_0.xci' to 'c:/MyDesigns/Xilinx/C2/C2.srcs/sources_1/bd/core/ip/core_PmodOLEDrgb_0_0/ip/PmodOLEDrgb_axi_quad_spi_0_0/PmodOLEDrgb_axi_quad_spi_0_0.xci'.
Examining the content of the PmodOLEDrgb folder (extracted from the "vivado-library-2018.2-1.zip" file), some of the subfolders are empty! However, when I look in Github, I see the files are there - so I will try and clone the repository or copy the missing files manually and try again.
best wishes, Franco