Rob Young

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  1. Scratching my head a bit and wondering about using WiFi as a port replacement for wired Ethernet with one of the Digilent FPGA boards such as CoraA7. But the application in mind may need to be able to stream data at a rate higher than I believe I can push through an SPI port into one of the PMOD WiFi gizmos. So, here are my questions: 1) What is the highest sustained data rate one can push into a PMOD WiFi gizmo. Assume just filling up UDP packets with sampled data and maybe a bit of header info. 2) What chip sets are viable that have an RMii type interface and would look (as closely as possible) like a wired connection? Thanks for your thoughts and pointers on places to look.
  2. Vivado 2018 in general is acting quite unstable. The SDK routinely crashes out without a cause in its log file. Seems to be rather common with Windows 10 but less so with the Linux implementation. Backing up to 2017.4 and I've stopped having SDK crashes and have been able to program the QSPI flash without incident, create a bootloader and boot into my larger test program every time.
  3. There is something fishy going on because I started over using 2018.2 and got it to work. Bring the same project forward into 2018.3 and it doesn't work. Isn't that swell.
  4. So I've taken a look at your project and have been trying to implement something similar. I am using an Arty A7-100T instead of the -35T so I started a fresh design. My issue is that if I follow the steps in the above referenced guide, I can get my FPGA programmed (I know this because I've attached one LED on the Arty A7-100T board which blinks under control of a counter in the PL) from the FLASH. But the SREC bootloader doesn't seem to be starting after the FPGA is programmed. I know the bootloader works because I put my Hello World at the magic address inside the QSPI-FLASH and then explicitly tell the SDK to run the bootloader code, the serial port comes to life and reports on the loading of Hello World and then jumps into that code and starts executing. Development is with Vivado 2018.3, Windows 8 and 10 (two different PCs) both 64bit. Tested on two Arty-A7-100Ts just in case there was some kind of board fault. Is there something that broke in 2018.3? Or something else I should do since I'm using the -100T instead of -35T. So far as I can tell, I'm not overwriting myself in the FLASH, the download.bit file and my hello_world.srec are far apart. The bit file is 2002kb so that's 0x001F4800 worth of space in the FLASH. And I'm putting my Hello_world.srec out at 0x00C00000 so I shouldn't be overwriting myself anywhere. Suggestions? Thanks for any help that may come. Linky to a zipped copy of my test project. https://drive.google.com/open?id=15lLWzbTffC-qnCvu9WO6QE2whmayol-m