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aeon20

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Topics posted by aeon20

  1.  

    Question: How to build your own RISC-V bitstream?

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 1 answer
  2.  

    Question: VGA example for Digilent Nexys A7?

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 13 answers
  3.  

    Question: How to work around missing switches used in existing bitstream?

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 6 answers
  4.  

    Question: RISC-V on Nexys A7?

    By aeon20, in Embedded Linux

    • Awaiting best answer
    • 0 votes
    • 4 answers
  5.  

    Question: xgpio.h: No such file or directory

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 1 answer
  6.  

    Question: How to connect something to multiple inputs on different blocks?

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 1 answer
  7.  

    Question: How to determine UART port in Linux?

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 15 answers
  8.  

    Question: No STDIO connection visible in the SDK

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 3 answers
  9.  

    Question: How to deal with no hardware devices showing up in Vivado?

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 10 answers
  10.  

    Question: Hello world like example for Digilent Nexys A7?

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 22 answers
  11.  

    Question: Confusion regarding Xilinx cable drivers

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 2 answers
  12.  

    Question: How to install and use djtgcfg?

    By aeon20, in FPGA

    • Awaiting best answer
    • 0 votes
    • 8 answers
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