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Showing content with the highest reputation since 08/02/20 in Posts

  1. 1 point

    USB audio on PYNQ-Z1

    Hi @tara901, I need to know some more info before we go further. What Linux are you using on the target and where did you get it? What USB-Mic are you trying to use? -Ciprian
  2. 1 point


    So cable drivers must be installed if you can program the FPGA. As to why you cannot run Hello world, check the logs for clues on whether elf download succeeds and could even try debug to see where the processor is stuck at. SDK terminal show a crash of some sort.
  3. 1 point


    Did you forget to install the cable drivers perhaps? https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_2/ug973-vivado-release-notes-install-license.pdf#G5.401934
  4. 1 point
    Hi @g3333t, It is possible to do this. You would need to do some networking to get this set up though. One option would be to open a port on your router and then forwarding the traffic to the OpenScope MZ. At that point you would just need an address that is accessible via the internet at large which you put into WaveFormsLive when connecting via network, which will be dictated by your ISP. Alternatively, you could set up a VPN connection between your remote computer and a VPN server on your home network that has the OpenScope MZ/WaveFormsLive available and SSH into it, but that would be a bit more work to get going. Thanks, JColvin
  5. 1 point


    I don't think what you are trying to do is possible. Library xfopencv, Xilinx's OpenCV implementation for HLS, much like the original one assumes there is an OS.
  6. 1 point

    Measuring Average Current

    Hi @Nikosant03 Having the shunt on the GND side will require rail-to-rail amp or a negative rail to supply it. You could also use a fully differential amplifier since the AD scope inputs are differential. I think an inst-amp should give the best results: https://en.wikipedia.org/wiki/Instrumentation_amplifier Sorry but I'm not an electronics engineer to projects such or to suggest exact parts.
  7. 1 point
    True but you'll need some means to break down the problem into smaller pieces that can be debugged individually. Otherwise you have this big black box and the information "it doesn't work". I'm not trying to sell you any methodology, simple answers or miracle tools - I would cut most corners myself if I had to do a similar job but you may need a little more "scaffolding" if doing it for the first time. A lot more if learning FPGA design along the way. BTW, the current consumption of your codec might serve as quick-and-dirty indicator that your register writes are going through (works for a module, not sure if this will help you)..