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Showing most liked content since 09/18/2017 in all areas

  1. 1 point

    FPGA based PWM generation

    Oh I forgot that I wanted to mention to the casual observers that if nothing else the project source shows how to create waveforms in Python, upload them into an FPGA block ram memory and have a waveform generator that runs at a particular sample rate. Python lists are not ideal containers for arrays of things but it does work on Windows and Linux and supports the serial port nicely. If I were using the DPTI interface I'd use C and be a happier camper ( there are a few things about Python that I don't like but it doesn't stop me from using it extensively ). Even if you don't care about PWMs, PDM, the PmodAMP2 or binary numbers there might be something worth slogging through all the excess verbage that Piasa finds irritating. Oh, and don't forget about simulation and verification...
  2. 1 point

    AD2 & Waveforms Reference Question

    Hi @Old Printer I'm glad to hear that you are well after the storm. Being without internet nowadays is almost like it was being without water 100 years ago... If I remember right earlier the AD2 manual was available as offline/pdf version but can't find it now. Anyway, this is on one page so it can be downloaded: https://reference.digilentinc.com/reference/instrumentation/analog-discovery-2/reference-manual The latest version of WaveForms application manual is in it under Help/Browse or: C:\Program Files (x86)\Digilent\WaveForms3\doc\ If you are interested in the WaveForms SDK, the manual and examples can be found under Windows start menu or in install location: C:\Program Files (x86)\Digilent\WaveFormsSDK\
  3. 1 point
    This is just follow up: I found that if you disconnect with the terminal program before plugging the USB cable back in and then reconnect right after plugging in the USB cable, all of the messages get presented. This way it seems to be ready before the FPGA DONE LED is presented. Considering the actual amount of the room in the flash that is required for the 35T FPGA load, an offset of 0x00218000 can be used to maximize the flash space that will still available for program code. This is 48% of the N25Q032 flash whereas the offset of 0x00300000 only leaves 25%. Again, I did not compress my image. I did program this new offset into blconfig.h and used it in the elf program flash step just to test it out and insure that it still worked.
  4. 1 point
    Hi @gm_, I was mistaken with question 1, to clarify: The JTAG-HS2 works in Vivado and iMPACT under Fedora. Sorry for the confusion, Jon
  5. 1 point

    Channels in the XADC

    Hi @cristian_zanetti, Tomorrow i will run our nexys 4DDR xadc project and try to get multiple channels going at the same time. I would also suggest looking through the 7-series xadc user guide. cheers, Jon
  6. 1 point
    Hi @Hariprasad Bhat, The schematic here available on the resource page here was made to work for both the XC3S250E-CP132 and the XC3S100E-CP132. The XC3S250E-CP132 was a drop in replacement for the XC3S100E-CP132. They are wired the same. The tutorials on the resource page should help with using your Basys 2. Also a lot of the documentation on our learn page for digital design here was made for the Basys 2. cheers, Jon
  7. 1 point

    Zybo root filesystem / following tutorial

    Hi, I am wondering why we need an 8 GB SD Card knowing that the one provided in the package is up to 4 GB. I have been able to make it work by changing the .dts file like this : bootargs = "console=ttyPS0,115200 root=/dev/ram0 rw init=/sbin/init earlyprintk rootwait devtmps.mount=1"; Hope you find a way. Mendeln