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  1. 1 point
    xc6lx45

    PmodHB5

    I'm sure it's possible to "drive" it at any rate. What I don't know is the amount and color of the magic smoke coming out :-) This is a fairly basic power electronics question: Each switching event dissipates energy because there is voltage across the transistor while current is nonzero. The question is, how much energy dissipation can you tolerate. With a 2A transistor you can probably feel with your finger whether or not it runs hot. In similar applications, PWM frequencies of 15 kHz or more are possible (search for "brushless ESC") but I doubt the motor will run any smoother.
  2. 1 point
    D@n

    XADC and the FFT

    @farhanazneen, I don't have @mohamed shffat's code, nor have I seen it. Therefore, I would struggle to answer your question regarding how he accomplished (or didn't accomplish) this task. As I recall, I've posted all of the details of my own solution on zipcpu.com, although several of the components were spread across multiple different blog posts. I think I've already linked to these above, though, so if you are missing some part of my own solution, please speak up. By the way, my solution is done in completely in Verilog. I haven't used the XADC (yet). It's also highly dependent upon what I call a debugging bus: a concept explored (and built) on my blog as well. Dan
  3. 1 point
    jpeyron

    Interfacing xadc to the zedboard

    Hi @farhanazneen, Here is an xadc project using hdl for the zybo that should be easily adapted to the zedboard. Here is the Nexys 4 DDR Spectral Sources Demo the is audio ftt hdl demo. Here is a forum thread that discusses using the Zedboard xadc with the ps. The forum thread also has a working xadc ps project for the zedboard. thank you, Jon
  4. 1 point
    BogdanVanca

    Zedboard Zynq 7000 XADC Header

    Hello @Bharath, Your problem comes from here: "#define XAdcPs_RawToVoltage(AdcData)((((float)(AdcData))* (3.0f))/65536.0f)". The multiply with 3 it's only made in case of the power supply sensors. Please check power supply, unipolar mode and bipolar mode chapters from the fallowing link: https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf. Best Regards, Bogdan Vanca
  5. 1 point
    xc6lx45

    Cora Z7-10 and Vivado 2018.2 (2)

    Hi, >> Which has nothing to do with the way , the signals are defined in the constraints file (led0_b, etc.) Yes: if I compare the constraints file with your "IO Bus port properties" screenshot, the names don't match. Also, the locations are different (because Vivado has auto-assigned them, thus the warning). I'd try to use ... get_ports{rgb_leds_tri_o[0]} in the constraints file instead of e.g. led0_b. This may be not the "proper" way to use the example so best make a backup first.
  6. 1 point
    Hello @Sridhar Prasath Aruppukottai Ganesan, Unfortunately, those of us here at Digilent are not familiar enough with Xilinx's UartLite interrupt example to be able to readily be able to explain and modify their demo. As Jon mentioned on your other thread, you'll likely need to reach out to Xilinx support on their forum for some additional support. We did find this blog that talked about using UART interrupts on a FPGA that might be helpful to you. Thanks, JColvin
  7. 1 point
    Ram

    vivado 2017.4

    Thank-you melisha ,,it is working Ram
  8. 1 point
    jpeyron

    Onie

    Hi @Onie, I am not familiar with the Pmonsenses´╗┐. Could you attach a link to this device? thank you, Jon
  9. 1 point
    jpeyron

    issue with design.txt file in xadc

    Hi @farhanazneen, Unfortunately, I do not have much experience simulating the XADC IP Core. I did find a tutorial here that should be helpful for you. I would suggest to also reach out to Xilinx support here as well. thank you, Jon
  10. 1 point
    jpeyron

    issue with design.txt file in xadc

    Hi @farhanazneen, Looking a little closer it appears you are trying to simulate just the xadc ip core. I did find a xilinx tutorial that does this for a different IP and Dev board but should be a helpful reference. You might find it easier to simulate a project then just the IP Core. Here is an hdl xadc project for the Zybo that should be relatively easy to get working on the Zedboard. thank you, Jon
  11. 1 point
    Hello, The engineer let me know that it is probably better to power VDD first, but they have not experienced any issues when VREF was powered first instead. As for the second question, the module has bypass capacitors on each rail, so no external bypass capacitors are needed. Thanks, JColvin
  12. 1 point
    jpeyron

    spi zynq

    Hi @Ram, This code looks like it takes the 4 bit cmd input and blinks the LEDs if the bit is set to 1 otherwise the LED stays off. thank you, Jon
  13. 1 point
    Hi @DEEPAK V, I apologize for the delay; the engineer best suited to answer your questions is out of the office so it will be a couple of days before I can get a response to you. Thank you, JColvin
  14. 1 point
    jpeyron

    Reprogram the PIC24 on Nexys 3 board

    Hi @Naipsys, The firmware for the PIC32 is not publicly shared. You will need to email support dot digilent at ni dot com to discuss getting the firmware for the PIC24 further. thank you, Jon