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Showing content with the highest reputation since 01/13/20 in Posts

  1. 1 point
    I'm quite sure you can use one account (I have done so on several PCs myself with Webpack). Looking at that license file, it says HOSTID=ANY To me, this looks like (but someone correct me if I'm wrong) that the free webpack license isn't even tied to one specific machine.
  2. 1 point
    I will try it to see how it works. Thank you too.
  3. 1 point
    To clarify, the Microblaze clock was set to 100Mhz, and the Axi Quad SPI used the default internal frequency ratio, which I think is 16, so I got a SCLK frequency of around 6 Mhz. But you say that you fixed it, and I want to know which mode did you use and it's working properly with Pmod DA4?
  4. 1 point
    What is the fixed version you are using? The clock was 100Mhz when I used it with Microblaze.
  5. 1 point
    JColvin

    Academic Pricing

    Hi @rober423, Are you still encountering this error? I know one thing that I had to do in the past was disable my ad-block since that was preventing the page from properly loading. Thank you, JColvin
  6. 1 point
    asmi

    Public service announcement: PLL locking

    You can force config logic to wait for PLL/MCMM locks before GSR deassertion and design startup. RTFM: UG472 table 3-7, parameter STARTUP_WAIT. But you've got to be careful with this option as design will never start if one of clocks is not present at startup - typical case being HDMI input, or just about any non-MGT high-speed input for that matter. So it's fine to use it for system clock(s), but it's a definitely "NO" for IO clocks.
  7. 1 point
    JColvin

    Storing Atlys PLB project to SPI/Flash

    Hi @chcollin, Re-reading the tutorial, the bootloader that is provided is intended to reader from the SPI flash via the Xilinx In-System Flash library (as opposed to the default provided by SDK that uses parallel NOR Flash) specifically for the flash on the Spartan-6 LX9 MicroBoard. Based on Table 5-5 (Spartan-6 FPGA Bitstream Length) in the corresponding User Guide, the default bitstream length is much larger for the LX45 device (11,939,296 bits), corresponding to 1.4574 MB. Looking at the flash used on the Atlys (a N25Q128 Numonyx chip which has 64 KByte sectors), this would use the first 23 sectors, leaving 233 sectors (~14,900 KBytes) for the application. It is also possible to compress the bitstream to have it use less resources, though I don't know how much it would get compressed. Extrapolating from the Avnet tutorial, the offset to choose in the blconfig.h file (create boot loader application, step 9) should be 0x170000. With regards to the flash family, I think you would want to choose the 5th one (Spansion) based on the Xilinx documentation for xilisf, since that Spansion option also apparently counts for Micron (and I understand the Numonyx chips are now owned by Micron), though I am uncertain about this since the tutorial I linked you to states that Micron devices have the same control set as STM (option 3). I'm not certain on the XPAR_SPI_FLASH_DEVICE_ID bit; everything that I have found leaves this value unchanged. I'll keep looking and let you know if I find something. Thanks, JColvin
  8. 1 point
    Hi @Hans Hübner The delay time between trigger and running (or repeats) can be specifies with: dwf.FDwfDigitalOutWaitSet(hdwf, c_double(sec)) The run length can be specified with: dwf.FDwfDigitalOutRunSet(hdwf, c_double(sec)) The number of repeats with: dwf.FDwfDigitalOutRepeatSet(hdwf, c_int(1)) # repeat once
  9. 1 point
    attila

    Running AD2 on Raspberry pi 3 B

    Hi @jody The Analog Discovery is working with Raspberry PI 4 B and many other single board ARM computers. It is not working with Raspberry PI 1, 2, 3 B It looks like there is incompatibility between USB controller and this.