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Showing content with the highest reputation since 12/22/18 in Posts

  1. 1 point

    NEXYS 4 Programming Flash

    @bhall, No, this makes perfect sense. Xilinx, in their infinite wisdom, created a SPI port clock pin to be used for configuring the device. It's controlled internally. When they then realized that customers would want to use it as well, they created a STARTUPE2 primitive that you need to use to get access to it. As such, its often not listed in the port lists, but still usable. On several of the newer Digilent designs, Digilent has connected that pin to two separate ports. This allows you to control the pin like a normal I/O. However, doing this requires special adjustments at the board level--not the chip level. Dan
  2. 1 point

    NEXYS 4 Programming Flash

    @bhall, You should thank @jpeyron for calling me out. I tend to ignore any threads with block diagrams in them--I just don't seem to be able to contribute to them that well. @jpeyron also cited the wrong reference to my article (Oops!). I think he meant to cite this article here on flash controller development. In general it's not really all that hard to do--you just need to spend some time working with the specification and your hardware, and a *really* *good* means of scoping out what's going on. The design built in this article assumes a DDR output. As such it can read a 32-bit word in (roughly) 72 system clocks. I have an older QSPI controller as well that I've used on many of my flash designs. It takes up twice as much logic. The link above should show you where and how to find it if you would like. This one doesn't use the DDR components. The other trick in what you are attempting to do will require you to read an ELF file. Check out libelf for that purpose. It's really easy to use, and should have no problems parsing your executable file--before it turns into an MCS file. Hope this helps, Dan
  3. 1 point

    PMOD ESP32 Driver error in SDK.

    Hi @StefanOR, I made a project using Vivado 2018.3 for the Zedboard with the PmodESP32 on JC. I got the same error after adding the main.c to my application. To fix this hold down the Ctrl key and left click on the xparameters.h on the top of main.c. This should open up xparameters.h. Then search xparameters.h for XPAR_PS7_UART. In my project XPAR_PS7_UART_1_DEVICE_ID was the defined parameter. So all I had to do was change XPAR_PS7_UART_0_DEVICE_ID to XPAR_PS7_UART_1_DEVICE_ID in the main.c code. I would guess that this is a version issue with Vivado 2018.3. I have contacted our content team about this issue for the PmodESP32. thank you, Jon
  4. 1 point

    Source Code in SDK

    Hi @Ahmed Alfadhel, I believe you should be able to read the data from the multiplier and the constant in the bram and send it out through the PmodDA3. For the BRAM you should use the functions in 'xil_io.h'. Xil_out8, Xil_Out16, Xil_Out32 to write Xil_in8, Xil_in16, Xil_in32 to read then you need to find the address of your BRAM -> check xparameters.h and for the PmodDA3 you will want to do something similar to the PmodDA1 main.c here. DA1_WritePhysicalValue(&myDevice, dValue); So you will need to put the bram value in place of dValue in the above function. You will need a function similar to DA1_WritePhysicalValue in PmodDA3.c and PmodDA3.h Hopefully this gets you going in the right direction! Jon
  5. 1 point

    Nexys Video Programming cable

  6. 1 point

    PMOD ESP32 Driver error in SDK.

    Hi @StefanOR, In you screen shot the main.c file is not saved. After saving the main.c file does the error goes away. If not then right click on the ESP_32_joey_bsp and re-generate the board support package. If that does not fix the issue try deleting the ESP_32_joey_bsp and adding a new board support package with the exact name you used in you sdk project "ESP_32_joey_bsp". I do not think you will need to add any additional libraries so then just select ok. Did re-adding the bsp fix the issue? If not, please attach a screen shot of your vivado block design. What version of Vivado and what FPGA development board are you using? thank you, Jon
  7. 1 point
    Ehud Eliav

    HS2 - JTAG SDK usage.

    Many thanks Jon. Ehud
  8. 1 point
    Thanks for the advice and a very speedy reply Regards Bill Legge.
  9. 1 point
    Hi @Abdul Qayyum, Have you verified that the HC05 bluetooth communication is working with the Arduino? The attached arduino code looks different than i expect. Here is a arduino tutorial for using the HC05 bluetooth. Aslo have you though about using the Pmod BT2 IP Core in the Vivado Library. Here is the digilent IP Core tutorial. thank you, Jon
  10. 1 point

    SDK 2018.3

    Hi @ababa, Glad to hear you were able to get this project working. cheers, Jon
  11. 1 point

    SDK 2018.3

    Hi @ababa, The SDK application send the words "hello world" out through the usb uart of the Nexys 4 DDR. It can be read with athe serial emulator on SDK or as we suggest on a serial emulator like tera term. You need to be connected to the correct com port and the baud rate set to 9600 (left on the default settings typically). thank you, Jon
  12. 1 point
    Hi @tom_123, Welcome to the forums. It appears that your VHDL source file is not being recognized as the top file. . Are you able to right click on the source and set it as the top file? Attach a screen shot of what is available for you when you right click on your VHDL file. Please attach the VHDL code and xdc file you are using. Here is the Zedboard resource center. Here is a Verilog project for the Zedboard. I would also suggest to install the digilent board files. thank you, Jon
  13. 1 point

    Source Code in SDK

    Hi @Ahmed Alfadhel, I would suggest looking at the Pmod DA1 here as an example for the Pmod DA3 main.c PmodDA3.h and PmodDA3.c . The arduino code and datasheet linked on the Pmod DA3 resource center here will help with configuring the DA3_SPIInit(). I use a bread board to gain access to the signals going from and to the Pmod DA3 to the Pmod port. I use the logic analyzer function of our Analog Discovery 2 to see what is happening if I am having problems communicating with the PmodDA3. thank you, Jon
  14. 1 point
    Hi @Sami Malik, Here is a link for using Block Ram in Verilog with Vivado. I have used IP Cores with a verilog top file like in the Zybo XADC demo. If you are also using the zynq processor then i believe you would need to use the IP Core along with controlling it from a SDK application. thank you, Jon
  15. 1 point

    GPS Pmod

    I must say I share D@n's opinion here. What I would do is start with a plain serial port. Create a dumb (non-clocked) FPGA design that routes the FTDI chip's UART pins to some GPIOs, and hook up the GPS module. Alternatively, use a standalone FTDI-to-UART module or equivalent. Fire up teraterm (e.g.) on the PC, open the COM port, set the correct baud rate. Check that the GPS module responds as expected. Check that the message format is exactly as you expect it. I suspect this assumption >> it seems, that the given functions from digilents pmodgps.h heather are doing already the right stuff won't hold. What you're trying reminds me of the old joke about a gynecologist retraining as a car mechanic🙂
  16. 1 point
    Hi @Abdul Qayyum, You should be able to use the Pmod BT2 in the PL without and issue. I linked multiple VHDL projects above that use the Pmod BT2 that should be good references for your project. thank you, Jon
  17. 1 point


    Hi @Ahmed Alfadhel, My understanding is that the AXI bus is has a width of 32 bits. I would adjust you multiplier to width to 32 to resolve the mismatch. thank you, Jon
  18. 1 point
    Ok, thank you for the reply. I'll contact one distributor in my Country.
  19. 1 point
    Derp. I deleted the other directories in there and it generated fine.
  20. 1 point

    GPS Pmod

    Hi @HelplessGuy, It looks like you are printing the pointer address instead of whats at the pointer. Please change the following line: printf("get Sentence: %s\n", *ptr_gps); //debug to printf("get Sentence: %s\n", ptr_gps); //debug thank you, Jon
  21. 1 point

    Delay between servo motors - Verilog

    Hi @cyclone4, Here , here and here should be good references for adding a delay in your verilog project. cheers, Jon
  22. 1 point


    Hi, >> "formal port ja_pin3_io of mode inout cannot be associated with actual port ja_pin3_io of mode out " is this maybe just a typo?
  23. 1 point
    Hi @Mahdi, Under the boards tab you right click on I2C on J2 and choose iic. You do not need to add an xdc. Then in sdk you add the PmodRTCC.c and PmodRTTC.h in the scr folder with your main file in the created application. thank you, Jon
  24. 1 point

    Analog Discovery 2 vs Raspberry Pi 3

    Thank you for the information. (Meanwhile I tried limiting the USB transfer rate of the device from 30/60MBps to kBps. This did reduce the frequency of lost USB packages from 1/second to 1/hour, but it did not solve the problem entirely.)
  25. 1 point
    Hi @Michael2018, I went through the tutorial andI got the same error as you. You need to add the following library below #include "xparameters.h" to resolve error. #include "xil_io.h" thank you, Jon