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Showing content with the highest reputation on 08/22/19 in all areas

  1. 1 point

    Using USB 2.0 on Cora Z7 board

    Hi @RFtmi, Welcome to the Digilent Forums! Are you referring to using the USB OTG and the USB 2.0 On-The-Go IP? Or the USB UART Bridge and the uartlite and the uart16550? I'm not aware of a free IP Core that facilitates using the USB OTG without linux. The USB UART Bridge is accessible through the ZYNQ Processor. Here is an Cora-Z7-10 XADC project that uses the USB UART Bridge which can be used through the Webpack edition of the Vivado. best regards, Jon
  2. 1 point

    Using USB 2.0 on Cora Z7 board

    Reading between the lines (apologies if I'm wrong, this is based solely on four sentences you wrote so prove me wrong): I see someone ("need the full speed ...") who'll have a hard time in embedded / FPGA land. For example, what is supposed to sit on the other end of the cable? A driver, yes, but for what protocol and where does that come from? Have you considered Ethernet? It's relatively straightforward for passing generic data and you could use multiple ports for different signals to keep the software simple. UDP is less complex than TCP/IP and will drop excess data (which may be what I want, e.g. when single-stepping code on the other end with a debugger).
  3. 1 point

    ADC and DAC pmod on ZYNQ 7020

    Hi Everyone! I have a verilog/Vhdl design that reads the input from a digilent pmod analog to digital converter (AD1) and send the output to another digilent pmod (digital to analog converter, DA2 or DA3). I checked that design on three different FPGA (Spartan6 lx9, Spartan 3 Starter kit and Zedboard). The design works fine on the above FPGAs. Now I decided to upgrade my design to run on a ZYNQ 7020, but it doesn't work. If the synchronization frequency is set to 20 MHz for example, I cannot see the clock to the corresponding pmod of the zynq board. If I slow down the frequency, I can see the clock but its amplitude is Small (around 200 mV compare to the reference voltage of 3.3 V). Moreover, I don't know why, but the clock signal seems to have an offset greater than 1V. I want to know if somebody before me faced the same problem? If yes how did you solve it? The second question I would like to ask is to know if Digilent Engineers checked their pmods on the Zynq 7020? If yes, could you please provide us with a template design as reference to check on our board? Thank you for any suggestions. Hervé