I just got this up and running:
It's a custom TFT LCD controller board using only two PMODs. The board controlling it is an FPGA devboard that communicates with the host computer using the FTDI's FT2232H in synchronous FIFO mode so that I can transfer data between the host and board at a rate of about 25MB/s using a simple protocol.
I wrote a scripting tool that glues together wishbone cores to create an FPGA image using a simple configuration file. Editing configuration files are great but I thought it would be so much better if I could modify the FPGA image by using a GUI so I worked on an application that does that. Here is a screen shot of how I visually created the LCD controller.
One of the big limitations of using USB 2.0 is the relatively large overhead to initiate a transaction, It's much faster if you send a large chunk of data. So instead of writing directly to the LCD controller I write to the SDRAM and then configure the LCD controller to read directly from the memory. This way I can write a new frame down to memory while the LCD controller is reading data out using a double buffer scheme (host writes to back, controller reads from front, then flip).
The protocol to communicate with the FPGA is a really simple protocol abstracted away in Python to simply 'read' and 'write'. It was pretty cool to communicate with the FPGA using a python module but I thought it would be so much better if I could interface with an FPGA using a GUI. So I added a visual interface to communicate with it (That's what I was using in the video).
If you're interested in the board here's the link: http://wiki.cospandesign.com/index.php?title=Dionysus
the code to control the LCD is here: https://github.com/CospanDesign/nysa-verilog/tree/master/verilog/wishbone/slave/wb_nh_lcd
The code is designed to be as generic as possible, so if you want to adapt it to your project it really just needs a wishbone bus but you can bypass Wishbone by just using the nh_lcd.v