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  1. Today
  2. Hi @attilaI observed that the maximum size received by the FDwfDigitalInStatusData is 409 characters. I transmitted 420 characters: (I counted the "0" to confirm its 420 characters) What I received was this: Its length is only 409, a few characters were missing. I also tried changing cSamples to a higher value: The result is: All bits returned were high bits and no ASCII values were decoded. Here's my question: If I want to receive a minimum of 8000 characters, which is better to use: the Record Mode or the Repeated Mode of the WF Logic Analyzer app? If you'll recommend Record Mode, can you please provide an example on how to use FDwfDigitalInStatusRecord? Because the example available in the samples folder is quite confusing. Best regards, Lesiastas
  3. I have cross compiled executable file from QT 4.8.7 and i am running it on SDR ADRV9361 board (Linaro-Ubuntu). When i run the cross compiled executable file (which is cross compiled on Ubuntu 16.04) on my SDR board, i got the error message like : " symbol lookup error : ./project: undefined symbol: _ZN7QWidget8qwsEventEP8QWSEvent". I don't know why i am getting this error as I conformed tool chain version on both side, please help. I followed following forums: https://mechatronicsblog.com/cross-compile-and-deploy-qt-5-12-for-raspberry-pi/ https://forum.qt.io/topic/52546/tuto-build-qt-to-cross-compile-for-arm/2 https://www.tal.org/tutorials/building-qt-512-raspberry-pi
  4. Hi @attila Thanks for all the help! I managed to replace all unsupported operators in VBA to make it work as expected. I'm now able to receive the raw samples from FDwfDigitalInStatusData and parse it to return ASCII values. I transmitted ASCII "vu": And the result in VBA is this: (DIO #0 & #1 were used for reception) Orange = represents start & stop bits. Yellow = represents bit sequence of ASCII ā€œvā€. Green = represents bit sequence of ASCII ā€œUā€. Other examples that I used are also successful: I also tried other values for the variable pin and I got the results that I wanted as well. Thanks again for all the help and support. More power to you and Digilent Best regards, Lesiastas
  5. Hello, I am trying to interact with my Basys 3 board through the JTAG port on the board but I am not sure what cable to use with it. The cables listed for sale that I've seen, like the JTAG-HS2, say that they are not needed for Digilent FPGA boards. Is there a cable that is intended for use with the FPGA boards? Thanks, Seth
  6. Hi, I am trying to synchronize two sine waves referring to the sample file "analogout_sync.cpp" using the master and slave technique, but I feel like there is too much of a delay before the second wave is generated still. When I use an external oscilloscope, it shows that the sine waves are not in sync and the phases change for the waves every time the program is rerun, so I can't hardcode a phase to fix it. Is there any way to make sure I can sync the two waves using C++ code? Thanks
  7. Yesterday
  8. Hi @sgrobler, The OpenLogger doesn't have any sort of RTC or time keeping mechanism. Because of that, the data cannot be timestamped and that functionality cannot be added. AndrewHolzer
  9. Vicentiu, Thanks for doing this. I'm having a bit of trouble identifying the pads since some of the features are covered by components. Can you possibly post a photograph so that I can attempt to perform this modification? Thanks again for looking into this problem. -David P.S. I also found that using a USB 3.0 hub made my connection much more stable.
  10. Trying to connect the MTDS PMOD to my CoraZ7-07S FPGA board. I used the Digilent MTDS IP but I'm having trouble figuring out how to connect it to PMOD port JB on the Cora board. Read on another answer that I should use JD by default but that's not an option in Cora. Vivado (2019.1) also warns that the IP was packaged for arty board but assume that's not an issue for me other than the JD issue. I saw on another post that I need to edit the XDC file to change the PMOD connector but I don't see how I can do that since the MTDS PMOD doesn't show on my constrains file. Thinking about wiring it manually. Any suggestions? Would appreciate any help.
  11. @PaulW, You might want to dig into the I2C protocol a bit more--tri-states are required on both SCL and SDA lines. The protocol is supposed to be a shared protocol between both multiple slaves and multiple masters. You should only ever drive those lines either tri-state or low, never-high--much like you are doing for SDA above. They're also supposed to be pulled high by the circuit board itself if nothing is using them. It is valid and possible for the slave to pull the SCL line low, in what's called "clock stretching." If it helps, you can find my own I2C controller(s) here. You'll find both a master and a slave controller there, both with WB interfaces. (You can find an AXI-lite to WB converter here, if you need it.) Using them, though, requires placing two tri-state assignments in your top-level file, like these. Finally, I ran into some trouble myself working with I2C and a monitor some time back. One problem I experienced was that reloading my design did not (necessarily) reset a broken I2C connection with another device. I still needed to send a STOP condition--particularly if I hadn't stopped it with a prior (broken) design. While the bus probably should have timeouts in its definition, implementing them is (IIUC) a violation of the protocol. Dan
  12. D@n, I am also working on this problem. Thanks for your input. I instantiated an ILA in the FPGA fabric and looked at the signals coming out of the Zynq-Arm core, see the picture included. When we try to access the Ps7-I2C peripheral, I see toggling on the I2C0_SCL_T signal. Interesting that it does not stay low, it goes back active high, implying to me that the SCL line is to be tri-stated, as if the Zynq-Arm was expecting to be a slave I2C device. I see no toggling on the SCL line, even when trigger only on it (in the FPGA fabric) after multiple accesses to the ps7-I2C peripheral. I checked through the XDC file and the pinout for the Zynq on the Cora board seems correct. I route the signals coming out of the Zynq-Arm to the block design wrapper (VHDL). I then just drive the SCL straight out of the Zynq, without any tri-state buffer, but I do tri-state the SDA line as required. Any more thoughts? Thanks again. --Tri state buffer for I2C interface I2C0_SCL <= I2C0_SCL_O; I2C0_SDA <= I2C0_SDA_O when (I2C0_SDA_T = '0') else 'Z'; I2C0_SDA_I <= I2C0_SDA;
  13. @solonfw, My first question would be whether or not you can measure the I2C SCL line internal to the FPGA at 1 or 0 vs using a voltmeter/scope external to the FPGA. Why? Because the first I'd be tempted to check is whether or not the XDC file was set up properly. Dan
  14. We're trying to get I2C communication working on our Cora Z7 boards. I tried sending data using the XIicPs_MasterSendPolled() function, but the data never gets clocked out. I found that after programming the FPGA, the SCL line goes low and stays low, which seems relevant. Any tips on what we might be doing wrong? Or how we can proceed? The I2C peripheral is in the ARM microcontroller itself, not in the FPGA fabric. The functions for setting up the peripheral and for transmitting data are shown below. bool I2CInit(void) { printf(" I2C Init: "); XIicPs_Config *Config = XIicPs_LookupConfig(XPAR_XIICPS_0_DEVICE_ID); if (NULL == Config) { printf("I2C Driver failed to get config\r\n"); return false; } if (XIicPs_CfgInitialize(&Iic, Config, Config->BaseAddress) != XST_SUCCESS) { printf("I2c Driver initialization failed\r\n"); return false; } if (XIicPs_SelfTest(&Iic) != XST_SUCCESS) { printf("I2C Driver self test failed\r\n"); return false; } // Set the I2C serial clock rate. XIicPs_SetSClk(&Iic, IIC_SCLK_RATE); printf("OK\r\n"); return true; } bool I2CSendData(uint8_t *msg, int32_t num_bytes, uint16_t slave_addr) { while (XIicPs_BusIsBusy(&Iic)) ; return (XIicPs_MasterSendPolled(&Iic, msg, num_bytes, slave_addr) == XST_SUCCESS); }
  15. Hi @RedskullDC, I have not heard of any development on this, but I will ask again about it. Thanks, JColvin
  16. Hi! There is a PMOD HAT for Raspberry PI - https://store.digilentinc.com/pmod-hat-adapter-pmod-expansion-for-raspberry-pi/ Actually DesignSpark provide support for very limited set of PMOD's (PmodAD1, PmodHB3, PmodISNS20, PmodMIC3, PmodOLEDrgb and PmodTC1) https://github.com/DesignSparkrs/DesignSpark.Pmod It would be nice to have Python examples for other PMOD's too (like TMP3, HYGRO, IMU, NAV and so on). Thanks!
  17. JColvin

    USB Power

    Hi @Glenn, That is likely the case; the AD2 will require the attached USB cable to support data as well as power, though you can use an external power supply to power the the Analog Discovery 2 instead of the USB cable. Let us know if you have any further questions. Thanks, JColvin
  18. Hi @Luke Abela, You only need to do that if you want to use the built in Xilinx SDK serial terminal. I would recommend using an external serial terminal such as tera term as is suggested in step 14 of the tutorial. Thanks, JColvin
  19. Had a kid put the micro usb in upside down and break the port. At least we hope that is all that is wrong with it. It does run, we just can not get communications out of the port. A pc with linux does see the board when it is plugged in, but no traffic.
  20. Hi @300cpilot, The warranty as I understand it is a one month time frame (based on the shipping and returns policy on the Digilent website) but if you are an academic customer it might be a bit longer. Unfortunately, we don't perform any repairs for our boards, though depending on what situation is, we may be able to help get your Nexys Video working. Can you provide some more details about what you mean with regards to the UART? Are you able to program your board otherwise? Thanks, JColvin
  21. @Raghunathan I can't solve your problem, but I can tell you that with my Android phone I have been able to connect wirelessly to OpenLogger and start/stop logging to SD card, with and without streaming. (I powerd my logger with a battery, so it was not connected to my PC). Once I start logging, I can disconnect the session, eg by switching off the hot-spot on my phone, and then reconnect again later (even the next day). It always takes a while to re-connect (and the blue light to come on), but I've always been able to do so. On my phone, I navigate to the waveformslive web page, I don't use the waveforms live android app - the app does not work. I think its quite impressive!
  22. Many thanks, for the first time I can access the data I've logged! šŸ˜‚šŸ˜€ 1 = did not work by itself, 2 = did not work by itself, 3 = once this is done then 1 works. (did not try 2) The .csv files that are created look like this: (timestamp in seconds in first column, then data in next columns, in my case in units of Volts) Log Completed Normally 0.00000, 1.74300, 1.63200, 2.03800 0.01000, 1.72400, 1.62700, 2.03000 0.02000, 1.73900, 1.63600, 2.02500 There is no information like a timestamp to give date\time that logging started - could that be added?
  23. It's occurred to me that even a 10 second lecture needs preliminary introductions. If you want to do cool stuff with logic then you need to understand numbers. Anything that you can do with decimal numbers you can do with binary numbers. Binary numbers can represent integer, fractional or mixed numbers; you just need to understand how to do the book-keeping that is required to know where the decimal point is in fixed length storage units like the std_logic_vector. You need to understand what happens when you throw away or truncate bits that don't fit your storage elements, and what happens when you use rounding to determine what that lsb should be. You need to understand bit growth for adding numbers and multiplying numbers. Once you figure out the basics your digital world becomes a vastly less limited place. Sure you can let others do your work for you using canned IP and such but this comes at a high cost and limits your horizons. It's not really much different for software applications, though these days few people would even consider trying to anything without pre-compiled libraries or high level functions that come with tools like Matlab.
  24. We have no such plans at the moment. Can you give us some details about your use case where you find a web interface more valuable over the desktop application?
  25. We purchased a Nexys Video Artix-7 FPGA: Trainer Board and we thought it was us that just could not get it to work, but it turns out that there is something wrong with the uart. I'm not sure on the warranty period on these but imagine it is short. Any insight would be appreciated.
  26. As of now it appears that WaveForms Live only supports the OpenScope and OpenLogger. Are there plans to eventually support the Analog Discovery 2? Perhaps via the "Digilent Agent" feature?
  27. You have the following options: Have the executable and the log file in the same directory. Use the full path to the executable C:\<path to executable>\dlog-utils-v2.2.0.exe inputfile.log outputfile.csv add C:\<path to executable> to the PATH variable so that windows knows where to search for that executable name
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