All Activity

This stream auto-updates     

  1. Past hour
  2. Had a kid put the micro usb in upside down and break the port. At least we hope that is all that is wrong with it. It does run, we just can not get communications out of the port. A pc with linux does see the board when it is plugged in, but no traffic.
  3. Hi @300cpilot, The warranty as I understand it is a one month time frame (based on the shipping and returns policy on the Digilent website) but if you are an academic customer it might be a bit longer. Unfortunately, we don't perform any repairs for our boards, though depending on what situation is, we may be able to help get your Nexys Video working. Can you provide some more details about what you mean with regards to the UART? Are you able to program your board otherwise? Thanks, JColvin
  4. @Raghunathan I can't solve your problem, but I can tell you that with my Android phone I have been able to connect wirelessly to OpenLogger and start/stop logging to SD card, with and without streaming. (I powerd my logger with a battery, so it was not connected to my PC). Once I start logging, I can disconnect the session, eg by switching off the hot-spot on my phone, and then reconnect again later (even the next day). It always takes a while to re-connect (and the blue light to come on), but I've always been able to do so. On my phone, I navigate to the waveformslive web page, I don't use the waveforms live android app - the app does not work. I think its quite impressive!
  5. Many thanks, for the first time I can access the data I've logged! 😂😀 1 = did not work by itself, 2 = did not work by itself, 3 = once this is done then 1 works. (did not try 2) The .csv files that are created look like this: (timestamp in seconds in first column, then data in next columns, in my case in units of Volts) Log Completed Normally 0.00000, 1.74300, 1.63200, 2.03800 0.01000, 1.72400, 1.62700, 2.03000 0.02000, 1.73900, 1.63600, 2.02500 There is no information like a timestamp to give date\time that logging started - could that be added?
  6. Today
  7. It's occurred to me that even a 10 second lecture needs preliminary introductions. If you want to do cool stuff with logic then you need to understand numbers. Anything that you can do with decimal numbers you can do with binary numbers. Binary numbers can represent integer, fractional or mixed numbers; you just need to understand how to do the book-keeping that is required to know where the decimal point is in fixed length storage units like the std_logic_vector. You need to understand what happens when you throw away or truncate bits that don't fit your storage elements, and what happens when you use rounding to determine what that lsb should be. You need to understand bit growth for adding numbers and multiplying numbers. Once you figure out the basics your digital world becomes a vastly less limited place. Sure you can let others do your work for you using canned IP and such but this comes at a high cost and limits your horizons. It's not really much different for software applications, though these days few people would even consider trying to anything without pre-compiled libraries or high level functions that come with tools like Matlab.
  8. We have no such plans at the moment. Can you give us some details about your use case where you find a web interface more valuable over the desktop application?
  9. We purchased a Nexys Video Artix-7 FPGA: Trainer Board and we thought it was us that just could not get it to work, but it turns out that there is something wrong with the uart. I'm not sure on the warranty period on these but imagine it is short. Any insight would be appreciated.
  10. As of now it appears that WaveForms Live only supports the OpenScope and OpenLogger. Are there plans to eventually support the Analog Discovery 2? Perhaps via the "Digilent Agent" feature?
  11. You have the following options: Have the executable and the log file in the same directory. Use the full path to the executable C:\<path to executable>\dlog-utils-v2.2.0.exe inputfile.log outputfile.csv add C:\<path to executable> to the PATH variable so that windows knows where to search for that executable name
  12. Yesterday
  13. Hello I would like to know if the GPIOs in Digilent boards are length matched. Thanks
  14. Hello again, Thank you for your assistance, I have now solved my issue. If you could kindly aid with me a final matter however, if you progress further along the tutorial, the tutorial states that you should be able to find a tab known as STDIO, this is unavailable for me on Xilinx SDK 2018.3 Could you kindly provide any information as to have to remedy this? Thank you for your aid, Luke
  15. Hello all I tried to implement zybo-z7-hdmi-demo using instructions in the: https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-z7-hdmi-demo/start https://reference.digilentinc.com/learn/programmable-logic/tutorials/github-demos/start and I got 5 critical warnings after Implementation of the this project for Zibo Z7-10 within Vivado 2016.4: ImplementationDesign Initialization[Common 17-55] 'get_property' expects at least one object. ["e:/VICT/Vivado2016_4/Zybo-Z7-10-HDMI/src/bd/system/ip/system_v_vid_in_axi4s_0_0/system_v_vid_in_axi4s_0_0_clocks.xdc":11] [Common 17-55] 'get_property' expects at least one object. ["e:/VICT/Vivado2016_4/Zybo-Z7-10-HDMI/src/bd/system/ip/system_v_tc_0_0/system_v_tc_0_0_clocks.xdc":5] [Vivado 12-259] No clocks specified, please specify clocks using -clock, -fall_clock, -rise_clock options ["e:/VICT/Vivado2016_4/Zybo-Z7-10-HDMI/src/bd/system/ip/system_v_tc_0_0/system_v_tc_0_0_clocks.xdc":6] [Vivado 12-4739] set_max_delay:No valid object(s) found for '-to [all_registers -clock [get_clocks -of [get_ports -scoped_to_current_instance clk]]]'. ["e:/VICT/Vivado2016_4/Zybo-Z7-10-HDMI/src/bd/system/ip/system_v_tc_0_0/system_v_tc_0_0_clocks.xdc":6] Route Design[Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations. impl_1launch_sdk -workspace E:/VICT/Vivado2016_4/Zybo-Z7-10-HDMI/proj/HDMI.sdk -hwspec E:/VICT/Vivado2016_4/Zybo-Z7-10-HDMI/proj/HDMI.sdk/system_wrapper.hdf [Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations. As I think the reference design must have all necessary parts to do implementation without the critical warnings. Please help me to resolve this problem. Thank you, Best regards, Viktor.
  16. jasonkh12

    Clocking Wizard

    Thank you @zygot, Yes, I am using ISE. The Clocking Wizard is greyed out in IP Core and cannot be selected. I will try to instantiate it as macros. Thank you.
  17. HI, Zygot, OK. I got you. Good advice. I will do that. Thank you !!! Antonio
  18. solved: the problem was made when syncing with a clock and nSamples bigger than clock cycles. solution: adding exit condition in acquire loop, using FDwfDigitalOutStatus to check if output is done
  19. Hi JC, et al. Any progress on a USB HID PMOD board? Surely I'm not the only one who would like to use a USB keyboard, but talk to it in PS/2 protocol on boards that don't have the PIC fitted. You've already developed the firmware and circuitry using the PIC chip, so it shouldn't be too difficult? Cheers, Leslie
  20. Hi Andrew Many thanks for this, I've been looking forward to this for a long time! However I'm still not smart enough to get it to work I've downloaded the executable and tried to run it by first opening a windows7 command window by typing "cmd". When that brings up a command window, I change directory to where the executable and my OpenLogger .log files are stored and type: dlog-utils-v2.2.0.exe inputfile.log outputfile.csv and the response I get is "dlog-utils-v2.2.0.exe is not recognized as an internal or external command, operable program or batch file" The readme on the repository says: Run an example (Windows): ./examples/build/main.exe log.dlog log
  21. RajD

    Victor

  22. Glenn

    USB Power

    Upon further reflection, I bet my switched cables do not have all the USB lines coming through. RPi only needs power via it's microUSB input.
  23. Last week
  24. Hi! Here is a small anouncement https://forums.ni.com/t5/NI-Blog/LabVIEW-Community-Edition/ba-p/3970512 New version of LINX will be released in May 2020 and beta is available now through Software Technology Preview website.
  25. Do a little hunting around the Digilent forums...
  26. Glenn

    USB Power

    Hello. Is there anything special about the USB power cable that comes with the AD2? I've tried to use a couple cables with inline switches to allow easier on/off, but neither seem to work. Both work with my RPi. Glenn
  27. When adding HDL sources to a project you can add files from a particular directory or add copies into a new project. For IP generated by Vivado or ISE things get messy because the tools don't always specify source files relative to the current project. This can be irksome when you change the IP in a source project to fit the needs of a current project. Sometimes short-cuts have negative consequences. My advise is to re-create IP for new projects. It takes a little longer but you don't have to contend with surprises.
  28. zygot

    Clocking Wizard

    Where'd you get that idea? Spartan 3 devices have DCM blocks so it is certainly possible to create a 100 MHz clock from a 50 MHz input. You are of course using ISE since Vivado doesn't support older devices. If you don't find what you are looking for in the IP you can always instantiate a DCM as a macro in Verilog ro VHDL. Sometimes, like the Genesys Vritex5 it's not obvious from the selection of clocking IP how to get what you want. The solution is to learn about the device and instantiating resources as macros from the literature.
  1. Load more activity