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  2. I was working on my project the other day and in between launches, the Vivado SDK stopped generating the drivers folder. I didn't change anything in my block diagram and only changed a little bit of VHDL in the top file (creating 2 wires unrealated to the IP cores). My block diagram has a Microblaze connected to 3 PMOD SD blocks and a BRAM controller. I've grabbed the most recent version of the vivado-master library from Digilent's Git. I'll attach the SDK output log. Let me know what else you need from me, and thanks a million in advance everyone! SDK.log
  3. Today
  4. I'm trying to boot petalinux on the Z7-20 board and after following the instructions in the github page, I am running into an error. After putting the SD card into the board and starting the boot process, it says there is a command not found. Do I need to try redownloading the packages in case an error occurred doing this? I'm running this off of Ubuntu 2017.4 and I know there were issues with the locale checks where I had to edit those files in order to bypass. Thank you for the help
  5. kwilber Thanks! That's what I need to know for now. I'm solidifying my choice of board and trying to locate anything which can't work with the board that I choose. I've been leaning towards Arty A7, and this was the last potential gotcha I have to check. I'll move forward now and assume Arty A7 is it. I'm still trying to get my company to install Vivado on my PC, or I would have been able to look myself directly. Allan
  6. The Digilent proprietary USB UART/JTAG circuity allows for simultaneous jtag and uart use.The board appears as two serial ports. Vivado and the SDK automatically find the jtag port and you can use a communication app like TeraTerm using the other port. The "hello world" example you can create in the SDK demonstrate that. Serial communication with the pc is fairly common.
  7. Hi @jamesW, I think that the bit depth of both images would need to be the same in order for it to work correctly (which I believe you said did work correctly at the end of your original post), though I am not certain of this. From what I can tell in the MTDS Library Programmer's Reference Manual (available as part of the documentation included in library download), it says in the BitMap Objects section that "Depending on the coordinates specified and the graphical element being drawn, the clipping can result in all, some, or none of the pixels making up the graphical element to be rendered actually being drawn on the bitmap itself. This is not an error, it is simply a natural consequence of the view that a bitmap is a viewport onto a larger virtual coordinate space." Truthfully, though I'm not certain when these circumstances would occur, though it seems to support the idea that both images would need to be the same bit depth. I also know there are a number of raster operations you can apply in the BitBlt() function as it's own parameter which specifices how the source and destination pixels are combined, but I'm not very familiar with how those all work visually, but the operations are defined on page 12. Thanks, JColvin
  8. Hi All, The first thing that I suspected is a bad cable, so I did try it with several different brand micro USB cables. I tested it with different USB ports, a powered USB hub, then I tested it with another PC. Same behavior in all cases. Second I suspected that maybe since the board was more recent than the other boards I had been using, I updated the Digilent drivers from the Digilent web site. I even installed the Digilent Adapt 2 app which permits you to program the part without Vivado. But the same flaky behavior was observed. I took a look at the board under a magnifying glass to see if anything is amiss -- it is tiny with 0201 parts, but it looks fine. I rebuilt the design (with different pinouts) for the Arty board, following the same programming sequence, and that worked fine on the first try. I regularly work with different FPGA boards, including the Zedboard, the original Zybo, the Zybo Z7-20 and the Arty with no such issues on the same setup so I think the likelihood that something with my installation of Vivado, drivers, or knowledge of FPGAs being the issue is low. I will test the current draw, but I cannot imagine that exceeding 500 mA would be considered normal for an idle board, especially if it is not driving anything external. The Arty works fine just powered off the USB bus (it has the same Xilinx XC7A35T-1C part). I'll look into how others resolved this problem, but it seems to look like an issue with the FTDI chip. Unfortunately the Cmod does not have an alternate JTAG pins to bypass the FTDI. Thanks!
  9. Hi @D@n Thank you for your perfect analyzing and solution to my issue . I just toggled the MSB in each written Byte and I got the sinewave finally. However, I wondered , since in the data sheets (AD5541A , AD7303) is mentioned I have to use operation amplifier in order to get a bipolar signal ! Thanks again.
  10. Thanks for your replies. Sure, if I can use the single USB cable for debug plus device configuration, I'll be glad to do it! I just didn't understand how Vivado would know about the USB-to-FTDI chip link for the Arty A7. Isn't this why we require Adept for configuration instead of doing it directly by Vivado? Also, I'm I'm using a UART bridge for communicating with the Arty A7, wouldn't debug wreck that connection? I'll look at the videos, but I doubt this sort of thing is covered, PC communication with the Arty boards is not something that most people do. Allan
  11. its not detected by waveforms or windows device manager.
  12. I am trying to figure out the pin functions on both the Zedboard and KC705 boards, and was wondering if there was a document that explains the functions of the pins based on their names.
  13. Hi @Allan Flippin, The USB UART connector/programming circuit on the Arty works with microblaze allowing you to debug in SDK. If you were wanting to use the JTAG HS2 as an alternative for configuring/debugging and running an application for the Arty in SDK you can do that to. I just made a simple GPIO/uart project using the JTAG HS2/JTAG connector to program the fpga and run the application which worked with one exemption. Using the JTAG HS2 did not facilitate a com port for serial communication. best regards, Jon
  14. jpeyron

    Vivado free for Artix-7?

    Hi @TerryS, Glad to hear you were able to get Vivado downloaded , installed and get through the "blinky" tutorial! Thank you for sharing what you had to do to get this done. best regards, Jon
  15. Thank you very much for your reply! My teacher asked me to modify the Makefile and then use the cross-compilation toolchain to compile the WiFi driver. For example, modify CC=gcc, AR=ar, KSRC, ARCH etc. My teacher limited me to make the WiFi AP in the above way, even though I have been able to configure the wifi driver in the Petalinux-config -c kernel to make the RT3070 as a WiFi AP easily. Can you give me some advice on the wireless network card model? I have tried RT3070, RT5572, RTL8812au, MT7601
  16. There have been other cases like this. The best solution is to use a high speed (good quality) USB cable.
  17. Hi @Kris Persyn, I'm glad to hear you were able to get the HDMI project up and running. Thank you for sharing what you had to do! best regards, Jon
  18. I'm trying to run the PMOD SD IP core on a Nexys 4 DDR, using simple drag and drop from the board tap. I also add a microblaze and an UARTlite for communication. I wish to run the SDK (autogenerated) example of the SD PMOD IP core. I have used the same approach with the OLED and several other PMOD and it worked out fine. But with the SD card it fails, I get these critical warnings. I am surprised there is a problem at all, since I only used the PmodSD IP core, written by Digilent. See below. The file of concern below: Thanks for any help!
  19. @dcc, This is really the backwards way to get something like this going. You should be proving your design in simulation before jumping into a design on hardware. Let me offer you an alternative. Here is a Verilog driver for talking to an SD card using SPI. If you have already chosen to use the AXI bus, you can find an AXI-lite to WB bridge here that will allow you to talk to this core. Even if you already have a driver you like, this documentation for this one describes how to set up the SD card to where you can talk to it, and provides examples of how to read and write sectors. Even better, there's a piece of C++ code which can be used as a simulator with Verilator. (Not sure if this would work with MicroBlaze or not.) You can then use Linux tools, such as mkfatfs and such, to create a file with a FAT format that you can use as a "simulated" SD card. When the simulation isn't running, you can mount the card on your system and check out/modify the files, and so know that things will work (based upon your experience with simulation) once you finally switch to hardware. Indeed, if you are willing to accept the risks, you could even interact with your SD card from the simulation environment itself. If you want an example of a set up that would control the SD card interface from a ZipCPU, you can check out the ZBasic repository which has such a simulation integrated into it. Indeed, there's even an sdtest.c program that can be used for that purpose. As for reading and comprehending the FAT filesystem, there's a FATFS repository that is supposedly good for use with embedded software. I haven't tried it, so I can't comment upon it that much. Alternatively, if you can control how the file system is laid out, you should be able to place a file of (nearly) arbitrary length a couple of sectors into the FS, and force the file to be use contiguous sectors. If you do that, then you've dealt with the most complicated parts about reading from the SD card. Just my two cents, and some thoughts and ideas along the way. Dan
  20. Hi @fangzr, I am not familiar with RTL8812au, but I managed to set up a ath9k dongle driver for the Zybo Z7-20 with petalinux. For the ATH9K it's easier because it has the driver in the kernel you just need to activate it. Regarding the RTL8812au all I can tell you from experience is that some Wireless dongles need additional firmware, like the ATH9K, which will be loaded in to the wireless automatically over USB, provided you set up your USB port to identify mass storage devices. These should be copied in to the corresponding folder on the rootfs of your target. Another critical issue is the driver dependencies, some Wireless drivers need to have certain Kernel drivers loaded in order for them to work, like the MAC80211 stack in the Kernel for instance. Please make sure that your driver is not depended on anything else. Based on the log you have sent us, I would start with this. -Ciprian
  21. thank you. I am not a very sophisticated programmer, but anyway I will let you know what sampling rate I achieved after doing it.
  22. Hi @JColvin, Thanks for the response ... I managed to figure it out eventually ... It's an HDL only project. Using Chipscope I was seeing that I could write different data (up/down count, etc) starting from address 0 and read that back correctly, but every time I opened the same SD on PC it wanted to format it. I was messing with the file system (which I don't need actually). HxD allows you to "opendisk" regardless of the file system, and also raw disk edit ... I found it on an MIT course. It's does the job. best, DCC
  23. vicentiu

    Nexys A7 not working

    Can you try connecting it to a different system, preferably a desktop? We have seen laptop usb ports that don't give enough power. Can you also try with another USB cable? Do you have access to a power supply to see if it turns on when supplied with external power?
  24. asd123

    Nexys A7 not working

    it is powered over USB, none of the led's on.
  25. Hello all who are reading this. I managed to get it working with this timing block. Constraints files can be found in the repository. Enjoy.
  26. asd123

    Nexys A7 not working

    it is powered over USB, none of the led is on.
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