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  2. None of the boards you listed are shown in the list, even by search. Zynq-7000 is not an option for part family.
  3. Hi @sgrobler and @benl, I was informed today that a conversion process of converting a dlog file into csv is now tested and working for OpenLogger and OpenScope MZ and is documented here: If you have any questions on this, I will try to answer them, but may end up deferring to @AndrewHolzer for the technical side of things. Thanks, JColvin
  4. Today
  5. Also, you added a picture from the default part. It's difficult to find something just by scrolling, so I suggest to find the ZYNQ like this:
  6. It's just the Cora or Other Zynq boards? I'm trying to figure out if it's something from Vivado installation since you said it won't recognize the ZYNQ part. Can you select ZedBoard or Zybo, Zybo Z7, Arty Z7? Are they visible in Vivado?
  7. It still isn't showing up. I should also note that I am using the new board files from the repository, not the old board files. It said if you are using 15.x or above to use new. I a using 2019.1
  8. Please try to put the Cora in board_parts instead of board_files and reopen Vivado. See if it gets recognized. Bianca
  9. Hi, JColvin Thank you very much for your answer. Actually what I need to do is to use some kind of software(Ethernet) driven interrupt. I cannot have a digital input interrupt to the ZYNQ processor. It all needs to be done over the ethernet connection to the computer. Any idea ? Thanks Antonio
  10. Hi Emma, Can you send me a screenshot to see how it looks like when you try to select the the board or the FPGA? Thanks, Bianca
  11. Hi @Serdar I don't know when will such feature be added for Digital Discovery. You could use a micro-controller or FPGA development board for such purpose:
  12. Exactly. You should be able to program the flash using the same method, just without having the convert to SREC box checked.
  13. I am fairly new to the Vivado and Digilent world, but I've worked with FPGAs before. I have a cora z7-07s board. I have followed the tutorials for downloading and installing the board files. I've read back through it multiple times. Here is the directly where I am placing the board files: C:\Xilinx\Vivado\2019.1\data\boards\board_files The cora-z7-07s folder is showing inside of the board_files folder. I then restart/boot vivado 2019.1, create a project. When the dialog box for the board selection appears, I cannot find the cora z7-07s board, or even the Zynq XC7Z007S-1CLG400C chip that the board uses. I cannot figure out why it is not finding the board.
  14. Hi! Is there any chance that support for ADALM2000 would be added in WaveForms? As a subscription, maybe.
  15. You can find the information in the OLED controller datasheet here: I attached a picture with the ratings of the chip. Bianca
  16. Do you know what the current demand of the PMOD-OLED is with all-lit pixels and full brightness - from the 3.3 volt supply ? And thanks for your kind help.
  17. Hi @tjw, For Pmod OLED we have a 3D part in the resource center here: Regards, Bianca
  18. Would this be similar for the monochrome PMOD-OLED ?
  19. Hi Tom, You can find the out-of-box demo here: Regards, Bianca
  20. Hello, I am facing a problem I don't understand. Probably I am miss-configuring something, but I don't find what. I am using XADC of the Nexys4 board through the PMOD connector. The design is a Microblaze with the XADC connected and a external memory to store the samples. The XADC is configured on single channel, and feed with a waveform generator sending a sine wave of 1 KHz. When I use the first pair of inputs, of the PMOD connector, Vaux3 in the board I get a perfect sinwave in the output. When I use any other XADC channel I get this a distortioned input. I use the same program and XADC configuration just changing the channel used. I get the same input on adc aux channel 2,10 and 11. Only channel 3 works. The program I am using is this. It configures the XADC in single channel and send the data through serial port. I recover it in a python program and paint them. Any idea? #include <stdio.h> #include "xparameters.h" #include "platform.h" #include "xsysmon.h" #include "xil_printf.h" #include "xstatus.h" #include "xuartlite.h" #define UARTLITE_DEVICE_ID XPAR_UARTLITE_0_DEVICE_ID #define SYSMON_DEVICE_ID XPAR_SYSMON_0_DEVICE_ID #define UART_BUFFER_SIZE 16 #define NUMBER_OF_SAMPLES 4500 int main() { static XSysMon SysMonInst; /* System Monitor driver instance */ unsigned int ReceivedCount = 0; unsigned char RecvBuffer[UART_BUFFER_SIZE]; XUartLite UartLite; unsigned int channel = 3; int Status; XSysMon_Config *ConfigPtr; XSysMon *SysMonInstPtr = &SysMonInst; int *sample; //External memory address to store samples sample=(int *)0x60000000; init_platform(); Status = XUartLite_Initialize(&UartLite, UARTLITE_DEVICE_ID); while(1){ ReceivedCount = 0; while(ReceivedCount==0){ ReceivedCount = XUartLite_Recv(&UartLite, (unsigned char *) RecvBuffer, 1); } ConfigPtr = XSysMon_LookupConfig(SYSMON_DEVICE_ID); if (ConfigPtr == NULL) { return XST_FAILURE; } XSysMon_CfgInitialize(SysMonInstPtr, ConfigPtr, ConfigPtr->BaseAddress); XSysMon_SetAvg(SysMonInstPtr, XSM_AVG_0_SAMPLES); XSysMon_SetAdcClkDivisor(SysMonInstPtr, 39); XSysMon_SetSequencerMode(SysMonInstPtr, XSM_SEQ_MODE_SINGCHAN); XSysMon_SetCalibEnables(SysMonInstPtr, XSM_CFR1_CAL_PS_GAIN_OFFSET_MASK | XSM_CFR1_CAL_ADC_GAIN_OFFSET_MASK); Status= XSysMon_SetSingleChParams(SysMonInstPtr, XSM_CH_AUX_MIN+channel, FALSE, FALSE, TRUE); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Disable all the alarms in the Configuration Register 1. */ XSysMon_SetAlarmEnables(SysMonInstPtr, 0x0); /* * Wait till the End of conversion */ //print("Capturing\n\r"); for(int i=0;i<NUMBER_OF_SAMPLES;i++){ XSysMon_GetStatus(SysMonInstPtr); /* Clear the old status */ while ((XSysMon_GetStatus(SysMonInstPtr) & XSM_SR_EOC_MASK) != XSM_SR_EOC_MASK); //Four last bits are noise *(sample+i) = XSysMon_GetAdcData(SysMonInstPtr, XSM_CH_AUX_MIN+channel); } //print("Finish capture\n\r"); //xil_printf("samples=np.array(["); for(int i=0;i<NUMBER_OF_SAMPLES-1;i++){ xil_printf("%d,",*(sample+i)); } xil_printf("%d\r\n",*(sample+NUMBER_OF_SAMPLES-1)); xil_printf("end\n"); } cleanup_platform(); return 0; }
  21. I am doing elf bootloader instead of SREC. Anybody please provide flashing steps after the application is ready. Should I uncheck corvert to SREC during flashing elf??
  22. I did the compression and the commenting verbose.But still it takes huge time to load elf from flash.FPGA programming from flash is happening fast.
  23. HI JColvin, It erased using FT_Prog software from FTDI,
  24. Yesterday
  25. Hi @mehdi, How did the EEPROM get erased? And you are using the JTAG HS2 with a Xilinx device of some kind? Are you not able to see the JTAG HS2 in Digilent's Adept program? Thanks, JColvin
  26. I require the download site for the zc2020 image processing factory image for programming an sdcard. I have searched Diligent sites but I have not been able to find it. Thank You Tom
  27. Hi @mustafasei, I reached out to another engineer about this, but unfortunately they did not have any additional advice for what could be attempted. Thanks, JColvin
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