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Information about how to repair a USB-TC is not readily available, but I might be able to have them repaired. Please send me a private message with both device serial numbers and your phone/email/shipping address. The repair process takes 4-5 weeks. If it can be repaired, my customer service department will contact you.

You can add (+) another AXI GPIO to your block diagram, similar to how it was done for the button in https://digilent.com/reference/programmable-logic/guides/getting-started-with-ipi. Name the (make) external connection pio instead of btn. Constrain the desired IO pins as pio_tri_io[0]...pio_tri_io[7]. Name the block AXI_GPIO_PIO and finish the build by running block automation. Follow the guide to create the HDL header, generate the bit stream, and export the design wrapper. In your SDK app, add the following, like it was done for the buttons and LEDs. #define PIO_ID XPAR_AXI_GPIO_PIO_DEVICE_ID #define PIO_CHANNEL 1 #define PIO_MASK 0b11111111 cfg_ptr = XGpio_LookupConfig(PIO_ID); XGpio_CfgInitialize(&pio_device, cfg_ptr, cfg_ptr->BaseAddress); XGpio_SetDataDirection(&pio_device, PIO_CHANNEL, 0); //output //update the first eight GPIOs. XGpio_DiscreteWrite(&pio_device, PIO_CHANNEL, pio_data);

Hello @bsee. The DT9812-10V (Digilent SKU: 6069-410-131) is still available for purchase. The MCC Universal Library for Windows software does not support Data Translation (DT) devices. DT devices use DT-Open Layers library (OMNI Software). The DT9812-10V supports event counting, as do various MCC devices if the decision is to migrate over to other devices and API library. Which DT API was used to develop the application, DataAcq SDK or DT-Open Layers for .NET? Regards, Fausto

`rpm -qip digilent.waveforms_beta_3.22.19.x86_64.rpm` warning: digilent.waveforms_beta_3.22.19.x86_64.rpm: Header V4 RSA/SHA256 Signature, key ID eb58bc22: NOKEY Name : digilent.waveforms Version : 3.22.19 Release : 1 Architecture: x86_64 Install Date: (not installed) Group : Engineering/misc Size : 68199451 License : see /usr/share/doc/digilent-waveforms/copyright Signature : RSA/SHA256, Tue Apr 23 11:54:07 2024, Key ID 134da9ebeb58bc22 Source RPM : digilent.waveforms-3.22.19-1.src.rpm Build Date : Mon Apr 22 09:47:27 2024 Build Host : attila-u16-64 Summary : Digilent WaveForms Description : Digilent WaveForms Application, Runtime and SDK. Support for Digilent Scopes & Instruments products. looks fine to me! is this the official 3.22.19 release?

Update - tried a newer DLC10 USB programming cable as per the GRMON3-UM page 40, but this still fails. Also ran the libusb-win32-devel-filter-1.2.6.0.exe tool per GRMON3-UM to install the Xilinx programming cable but GRMON still fails. FYI - I am using W10.

@Kevin.C Can you try this one and let me know if it works: https://digilent.s3.us-west-2.amazonaws.com/Software/Waveforms3Beta/3.22.19/digilent.waveforms_beta_3.22.19.x86_64.rpm Thanks, Michael

Hi! Following up here -- let me know if I can help answer any more questions! Thank you guys so much for the help here. @JColvin @attila @malexander

Hello, I have a zybo z7-20 that is no longer recognized by vivado. Would it be possible to get instructions on factory resetting the board? Thank you, Eric

Thank you so much for your time! This is working great.

The USB-1608GX-OEM board was discontinued and is no longer available. The recommended replacement is the USB-1608GX-2AO-OEM.

The BASYS 3 FPGA board has a 100 MHz system clock, so updating the PMOD interface at 25 MHz should be possible.

The USB-231 does not have PWM support, so no. Instead, please consider a USB-1608G or a USB-1808X. These two devices have a timer output that can be used for PWM.

Dear attila, Thank you for your quick reply. I could make the wave form by your advice. Thank you so much.

¿Es posible generar una señal PWM con el hardware USB-231?

Hi. I followed your guidelines and did the following changes in the design. The response of FFT is improved but not accurate. At first i was getting peak after 2 cycles but now its after about 10 to 11 cycles. Maybe I'm missing out some basic things to do this task. Kindly guide me about it.

https://blog.csdn.net/m0_52850847/article/details/137159548 I also had the same problem with my Arty Z7 20 board. I found the solution as mentioned in above link. I need to change parameters of my Zynq PS system and I can now flash my boot image into on board flash memory.

Hi @AlexMark6 You can use the Sweep mode or Amplitude Modulation or a custom waveform but this later one would be limited in resolution.

Hi @AndyMessier See the following: ramp_test2.py

I want to make a 2 step damping sine wave as below. 1st step is the amplitude increses linearly from 0 to 1. 2nd step is the amplitude decreses linearly from 1 to 0. Can I make such a wave form by Waveforms application for Analog Discovery2? If can, please teach me how to make, please.

Hello, is it possible to get the "USB-1608GX: 16-bit, 500 kS/s Multifunction DAQ Device" as OEM board? In the online shop only "USB-1608G-OEM" and "USB-1608GX-2AO-OEM" are offered as OEM board. Regards

Are there any tutorials on setting a counter with the Logic Analyzer? For example, we're setting up a decade counter (7490) and a BCD (7447) seven-segment display. For decade counter (clk) input, set a 1Hz and the Q0-3 as outputs. Please advise when you have time. Thanks Jeff

Thanks. I appreciate your time.

I am unable to connect to the Arty S7 50 using a Xilinx programming cable. Vivado HW manager says no active target available. I need help determining what I am doing wrong. Thanks! - Xilinx Programming Cable is connected to the J9 with flyleads per the latest schematics Rev E.1 (12/13/17) which patches the board (marked Rev E). - Mode jumper is not installed so the board is not booting from QSPI - Board is powered using barrel jack with no USB cable connected and indicates power good. - Xilinx programming cable driver installed as it shows up as programming cable in device manager. - Cable indicator is green. HW manager returns the following information: connect_hw_server INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121 INFO: [Labtools 27-3415] Connecting to cs_server url TCP:localhost:3042 INFO: [Labtools 27-3414] Connected to existing cs_server. localhost:3121 open_hw_target {localhost:3121/xilinx_tcf/Xilinx/Port_#0005.Hub_#0001} INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/Port_#0005.Hub_#0001 ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Xilinx/Port_#0005.Hub_#0001. Check cable connectivity and that the target board is powered up then use the disconnect_hw_server and connect_hw_server to re-register this hardware target. ERROR: [Common 17-39] 'open_hw_target' failed due to earlier errors.

The counter input uses a 50 MHz clock (20nS per tick) and counts repeatedly from the leading edge of your sensor's signal to the next lead edge. At 112,000 RPM (784k Hz), the ideal count is 63.75, 784,000 Hz. However, in the real world, the count may be only 60 or 833,333.3 Hz. There will be more errors in the upper frequencies because the counter input has less time to count. With that said, could you review the attached VI? It will demonstrate a better (more straightforward) way to measure frequency. You can ignore the counter output (TMR0) I used for a test signal. ULx Meas Dig Freq-Buffered-Cont-test.vi

Hey there, I am currently working on a project that runs a simple CPU on the Zybo Z7 FPGA. I used generated code from a previous project as a starting point, so I do not have any Block Design sources at all, only Verilog source code. I want to be able to read a .txt file with machine code from an SD Card in order to control the buttons and LEDs on the board. I am currently trying to locate information on how to configure the SD card pins in the design constraints file (Zybo-Z7-Master.xdc). I am hoping to find information for what to set the value of PACKAGE_PIN for MIO pins 40-45 and 47. I am struggling to find an example of configuring any MIO pins in the .xdc file, and am hoping to avoid using any Block Design sources as this would be very difficult to integrate into my project in its current state. TLDR: Looking for what to put for <pin number> for MIO pins 40-45 and 47 on Zybo Z7 board in master.xdc set_property -dict { PACKAGE_PIN <pin_number> IOSTANDARD LVCMOS33 } [get_ports <port_name>];